[llvm-bugs] [Bug 35926] New: [ARM] TableGen doesn't select VFNMSD
via llvm-bugs
llvm-bugs at lists.llvm.org
Fri Jan 12 06:54:19 PST 2018
https://bugs.llvm.org/show_bug.cgi?id=35926
Bug ID: 35926
Summary: [ARM] TableGen doesn't select VFNMSD
Product: libraries
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: enhancement
Priority: P
Component: GlobalISel
Assignee: unassignedbugs at nondot.org
Reporter: diana.picus at linaro.org
CC: llvm-bugs at lists.llvm.org
Created attachment 19666
--> https://bugs.llvm.org/attachment.cgi?id=19666&action=edit
Reproducer
When running
llc -mtriple arm-gnueabihf -mattr=+vfp4 vfnmsd.ll
-stop-before=expand-isel-pseudos
we get a VFNMSD instruction. If we add -global-isel, we only get a VNEGD
followed by a VFNMAD.
It seems this only happens because the code for matching the VFNMSD comes after
the one for matching VFNMAD in the match table (if we manually tinker with the
order in ARMGenGlobalISel.inc, then we can successfully select VFNMSD with
-global-isel).
The relevant patterns are in ARMInstrVFP.td:
// (fneg (fma x, (fneg y), z) -> (vfnms z, x, y)
def : Pat<(fneg (f64 (fma DPR:$Dn, (fneg DPR:$Dm), DPR:$Ddin))),
(VFNMSD DPR:$Ddin, DPR:$Dn, DPR:$Dm)>,
Requires<[HasVFP4,HasDPVFP]>;
// (fneg (fma x, y, z)) -> (vfnma z, x, y)
def : Pat<(fneg (fma (f64 DPR:$Dn), (f64 DPR:$Dm), (f64 DPR:$Ddin))),
(VFNMAD DPR:$Ddin, DPR:$Dn, DPR:$Dm)>,
Requires<[HasVFP4,HasDPVFP]>;
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