[llvm-bugs] [Bug 35833] New: [PCG] Failed to merge identical lower/upper 128-bit shuffles into 256-bit shuffle

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=35833

            Bug ID: 35833
           Summary: [PCG] Failed to merge identical lower/upper 128-bit
                    shuffles into 256-bit shuffle
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: konstantin.belochapka at sony.com
                CC: llvm-bugs at lists.llvm.org

__m256 shuf0(__m256 a, __m256 b)
{
  return
    __builtin_shufflevector(a, b, 0, 2, 4, 6, 8, 10, 12, 14);
}

_Z5shuf0Dv8_fS_:
vextractf128 xmm2,ymm1,1
vshufps      xmm1,xmm1,xmm2,88h
vextractf128 xmm2,ymm0,1
vshufps      xmm0,xmm0,xmm2,88h
vinsertf128  ymm0,ymm0,xmm1,1
ret

__m256 shuf1(__m256 a, __m256 b)
{
  return
    __builtin_shufflevector(a, b, 1, 3, 5, 7, 9, 11, 13, 15);
}

_Z5shuf1Dv8_fS_:
vextractf128 xmm2,ymm1,1
vshufps      xmm1,xmm1,xmm2,0DDh
vextractf128 xmm2,ymm0,1
vshufps      xmm0,xmm0,xmm2,0DDh
vinsertf128  ymm0,ymm0,xmm1,1
ret

Which means that this is far more complicated than it needs to be

__m256 add_shuf0_shuf1(__m256 a, __m256 b)
{
  return
    __builtin_shufflevector(a, b, 0, 2, 4, 6, 8, 10, 12, 14) +
    __builtin_shufflevector(a, b, 1, 3, 5, 7, 9, 11, 13, 15);
}

_Z15add_shuf0_shuf1Dv8_fS_:
vextractf128 xmm2,ymm1,1
vshufps      xmm3,xmm1,xmm2,88h
vextractf128 xmm4,ymm0,1
vshufps      xmm5,xmm0,xmm4,88h
vinsertf128  ymm3,ymm5,xmm3,1
vshufps      xmm1,xmm1,xmm2,0DDh
vshufps      xmm0,xmm0,xmm4,0DDh
vinsertf128  ymm0,ymm0,xmm1,1
vaddps       ymm0,ymm3,ymm0
ret

These 256-bit shuffles could be achieved as a VPERM2F128 followed by a VSHUFPS

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