[llvm-bugs] [Bug 22391] New vector shuffle legality: turns pshufd+palignr into shufps x2.

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=22391

Simon Pilgrim <llvm-dev at redking.me.uk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
 Fixed By Commit(s)|                            |325354
         Resolution|---                         |FIXED

--- Comment #2 from Simon Pilgrim <llvm-dev at redking.me.uk> ---
This was finally fixed at the DAG level by rL325354 (SimplifyDemandedVectorElts
shuffle mask simplification). 

Note, it'd have been effectively fixed for sometime as InstCombine would
already simplify the test case from:

  %s1 = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 1,
i32 2, i32 2>
  %s2 = shufflevector <4 x i32> %s1, <4 x i32> %b, <4 x i32> <i32 3, i32 4, i32
5, i32 6>
  ret <4 x i32> %s2

to

  %s1 = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 undef, i32
undef, i32 undef, i32 2>
  %s2 = shufflevector <4 x i32> %s1, <4 x i32> %b, <4 x i32> <i32 3, i32 4, i32
5, i32 6>
  ret <4 x i32> %s2

which would correctly lower to vpshufd/vpalignr.

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