[llvm-bugs] [Bug 40135] New: [x86] keep math/logic on vector unit to avoid insert/extract
via llvm-bugs
llvm-bugs at lists.llvm.org
Fri Dec 21 13:14:45 PST 2018
https://bugs.llvm.org/show_bug.cgi?id=40135
Bug ID: 40135
Summary: [x86] keep math/logic on vector unit to avoid
insert/extract
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: X86
Assignee: unassignedbugs at nondot.org
Reporter: spatel+llvm at rotateright.com
CC: craig.topper at gmail.com, llvm-bugs at lists.llvm.org,
llvm-dev at redking.me.uk, spatel+llvm at rotateright.com
We have a potential regression with shift lowering via rotates while trying to
do scalarization in:
https://reviews.llvm.org/D55722
I don't think we're allowed to do anything with this in IR even if the pattern
was appearing there:
define <4 x i32> @shiftamount_math(<4 x i32> %x, <4 x i32> %y) {
%e = extractelement <4 x i32> %x, i32 0
%s = sub i32 32, %e
%i = insertelement <4 x i32> undef, i32 %s, i32 0
%splat = shufflevector <4 x i32> %i, <4 x i32> undef, <4 x i32>
zeroinitializer
%shift = shl <4 x i32> %y, %splat
ret <4 x i32> %shift
}
$ llc -o - vecshift.ll
...
movd %xmm0, %eax
movl $32, %ecx
subl %eax, %ecx
movd %ecx, %xmm0
pslld %xmm0, %xmm1
movdqa %xmm1, %xmm0
retq
We would probably be better off loading the '32' as a splat constant and doing
the 'sub' as a vector op:
movdqa LCPI1_0(%rip), %xmm2 ## xmm2 = [32,32,32,32]
psubd %xmm0, %xmm2
pxor %xmm0, %xmm0
movss %xmm2, %xmm0 ## xmm0 = xmm2[0],xmm0[1,2,3]
pslld %xmm0, %xmm1
movdqa %xmm1, %xmm0
It's ugly because of the x86
vector-shift-by-variable-but-not-really-a-vector-shift instruction that takes a
64-bit shift amount, but that beats transferring to scalar and back?
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