[llvm-bugs] [Bug 39956] New: [X86][SSE] Do we need X86ISD::PINSRW + X86ISD::PINSRB?

via llvm-bugs llvm-bugs at lists.llvm.org
Tue Dec 11 06:11:32 PST 2018


            Bug ID: 39956
           Summary: [X86][SSE] Do we need X86ISD::PINSRW + X86ISD::PINSRB?
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: llvm-dev at redking.me.uk
                CC: craig.topper at gmail.com, llvm-bugs at lists.llvm.org,
                    llvm-dev at redking.me.uk, spatel+llvm at rotateright.com

ISD::INSERT_VECTOR_ELT should allow implicit truncation of larger types - I
think the x86 opcodes are there just to guarantee i32 scalar inputs which we
might be able to handle in other ways.

NOTE: X86ISD::PEXTRW + X86ISD::PEXTRB are trickier due to their implicit
zero-extension, I don't think ISD::ASSERTZEXT can help us there.

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