[llvm-bugs] [Bug 37277] New: Long compile time in MachineCSE profitability checks.

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=37277

            Bug ID: 37277
           Summary: Long compile time in MachineCSE profitability checks.
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Common Code Generator Code
          Assignee: unassignedbugs at nondot.org
          Reporter: huihuiz at codeaurora.org
                CC: llvm-bugs at lists.llvm.org

We have a reduced test case that shows LLVM pass "Machine Common Subexpression
Elimination" is taking a long while, especially in function
isProfitableToCSE().

In the reduced test case, test.ll, we observed that 82.6% out of total compile
time 46.6 seconds is spent on MachineCSE. And most of the time is spent on the
profitability checks.

There are a lot of repetition in the implementation of isProtitableToCSE(),
e.g., repetitively scanning through the use instruction of Reg and CSReg.

run commands:
llc test.ll -o /tmp/output
with time report
llc -time-passes test.ll -o /tmp/output


===-------------------------------------------------------------------------===
                      ... Pass execution timing report ...
===-------------------------------------------------------------------------===
  Total Execution Time: 46.6000 seconds (46.6320 wall clock)

   ---User Time---   --System Time--   --User+System--   ---Wall Time---  ---
Name ---
  38.2800 ( 82.6%)   0.0760 ( 32.8%)  38.3560 ( 82.3%)  38.3652 ( 82.3%) 
Machine Common Subexpression Elimination
   2.3800 (  5.1%)   0.1200 ( 51.7%)   2.5000 (  5.4%)   2.5276 (  5.4%)  ARM
Instruction Selection
   1.2160 (  2.6%)   0.0000 (  0.0%)   1.2160 (  2.6%)   1.2168 (  2.6%) 
Simple Register Coalescing
   0.7440 (  1.6%)   0.0040 (  1.7%)   0.7480 (  1.6%)   0.7480 (  1.6%) 
Greedy Register Allocator
   0.6040 (  1.3%)   0.0040 (  1.7%)   0.6080 (  1.3%)   0.6129 (  1.3%)  Live
Variable Analysis
   0.5680 (  1.2%)   0.0000 (  0.0%)   0.5680 (  1.2%)   0.5698 (  1.2%)  ARM
constant island placement and branch shortening pass
   0.4000 (  0.9%)   0.0000 (  0.0%)   0.4000 (  0.9%)   0.4016 (  0.9%) 
Control Flow Optimizer
   0.3160 (  0.7%)   0.0000 (  0.0%)   0.3160 (  0.7%)   0.3162 (  0.7%)  If
Converter
   0.2360 (  0.5%)   0.0040 (  1.7%)   0.2400 (  0.5%)   0.2377 (  0.5%)  Live
Interval Analysis
   0.2360 (  0.5%)   0.0000 (  0.0%)   0.2360 (  0.5%)   0.2324 (  0.5%) 
Branch Probability Basic Block Placement
   0.1720 (  0.4%)   0.0000 (  0.0%)   0.1720 (  0.4%)   0.1708 (  0.4%)  Post
RA top-down list latency scheduler
   0.0920 (  0.2%)   0.0000 (  0.0%)   0.0920 (  0.2%)   0.0897 (  0.2%) 
Machine code sinking
   0.0720 (  0.2%)   0.0080 (  3.4%)   0.0800 (  0.2%)   0.0818 (  0.2%)  ARM
Assembly Printer
   0.0720 (  0.2%)   0.0040 (  1.7%)   0.0760 (  0.2%)   0.0721 (  0.2%) 
ReachingDefAnalysis
   0.0640 (  0.1%)   0.0000 (  0.0%)   0.0640 (  0.1%)   0.0617 (  0.1%) 
CodeGen Prepare
   0.0600 (  0.1%)   0.0000 (  0.0%)   0.0600 (  0.1%)   0.0616 (  0.1%) 
Simplify the CFG

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