[llvm-bugs] [Bug 32982] New: ARM/AArch64: Fill gaps in .text with trap instructionsm
via llvm-bugs
llvm-bugs at lists.llvm.org
Tue May 9 13:13:29 PDT 2017
https://bugs.llvm.org/show_bug.cgi?id=32982
Bug ID: 32982
Summary: ARM/AArch64: Fill gaps in .text with trap
instructionsm
Product: lld
Version: unspecified
Hardware: All
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: ELF
Assignee: unassignedbugs at nondot.org
Reporter: ruiu at google.com
CC: llvm-bugs at lists.llvm.org
For x86 and x86-64, we will gaps in a .text section with 0xCC (a trap
instruction) to (a) make disassembly beautiful compared to leaving them 0 and
(b) catch fall-through errors if that happens.
I wonder if we want to do the same thing for ARM/AArch64.
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