[llvm-bugs] [Bug 33758] New: AVX-512: Horizontal add pattern match does not work on <16 x i32> vectors

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=33758

            Bug ID: 33758
           Summary: AVX-512: Horizontal add pattern match does not work on
                    <16 x i32> vectors
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: elena.demikhovsky at intel.com
                CC: llvm-bugs at lists.llvm.org

Created attachment 18782
  --> https://bugs.llvm.org/attachment.cgi?id=18782&action=edit
Hadd example for <8 x i32> and <16 x i32> cases

The phadd instruction is not chosen from <16 x i32> shuffles+add combination.
This affects reduction tail code.

The same pattern generates better sequence on <8 x i32> code and on AVX2
target.

        vpshufd $238, %zmm0, %zmm1
        vpaddd  %zmm1, %zmm0, %zmm0
        vpshufd $229, %zmm0, %zmm1 
        vpaddd  %zmm1, %zmm0, %zmm0
        vmovd   %xmm0, %eax

better sequence:

        vpshufd $238, %zmm0, %zmm1
        vpaddd  %zmm1, %zmm0, %zmm0
        vphadd  %zmm0, %zmm0, %zmm0
        vmovd   %xmm0, %eax

run llc -skx < hadd.ll to reproduce

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