[llvm-bugs] [Bug 31789] New: No support for non-zero address-space in some Masked Vector Gather and Scatter Intrinsics

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https://llvm.org/bugs/show_bug.cgi?id=31789

            Bug ID: 31789
           Summary: No support for non-zero address-space in some Masked
                    Vector Gather and Scatter Intrinsics
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: normal
          Priority: P
         Component: Core LLVM classes
          Assignee: unassignedbugs at nondot.org
          Reporter: zvi.rackover at intel.com
                CC: llvm-bugs at lists.llvm.org
    Classification: Unclassified

The masked-load and masked-store intrinsics *do* support accesses to pointer in
non-zero address-space.
On the other hand, these intrinics do not have it implemented
masked-gather, masked-scatter
masked=compress, masked-expand (these are not documented)

The motivation for this issue is to support OpenCL which is lowered by Clang to
LLVM IR containing pointers to multiple address spaces.

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