[llvm-bugs] [Bug 31755] New: carry detection missed optimization in chained add-with-carry

[via llvm-bugs]

https://llvm.org/bugs/show_bug.cgi?id=31755

            Bug ID: 31755
           Summary: carry detection missed optimization in chained
                    add-with-carry
           Product: new-bugs
           Version: 3.9
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: vincent-llvm at vinc17.net
                CC: llvm-bugs at lists.llvm.org
    Classification: Unclassified

A carry can be detected so that an adcq instruction can be generated on x86_64.
But this does not work when the carry-out of this second addition is used for a
third addition. I have tested only on x86_64 (see below), but other similar
targets by be affected too.

Example:

typedef unsigned long T;

void f (T, T, T);

void add0 (T a, T b, T c, T w)
{
  T u = a, v = b;
  T carry1;

  a = u + w;
  carry1 = a < u;
  b = v + carry1;
  f (a, b, c);
}

void add1 (T a, T b, T c, T w)
{
  T u = a, v = b;
  T carry1, carry2;

  a = u + w;
  carry1 = a < u;
  b = v + carry1;
  carry2 = b < v;
  c += carry2;
  f (a, b, c);
}

Under Debian/unstable with Clang 3.9.1, using -O3, I get:

add0:                                   # @add0
        .cfi_startproc
# BB#0:
        addq    %rcx, %rdi
        adcq    $0, %rsi
        jmp     f                       # TAILCALL

Here, one can see that an adcq instruction is generated for the second
addition.

add1:                                   # @add1
        .cfi_startproc
# BB#0:
        addq    %rcx, %rdi
        sbbq    %rax, %rax
        andl    $1, %eax
        addq    %rax, %rsi
        adcq    $0, %rdx
        jmp     f                       # TAILCALL

The adcq instruction is generated for the third addition, but not for the
second one. The sbbq / andl / addq sequence could have been replaced by a
single adcq.

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