[llvm-bugs] [Bug 35675] New: [X86] A few gather instructions seem to have bogus scheduling info on skylake server

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=35675

            Bug ID: 35675
           Summary: [X86] A few gather instructions seem to have bogus
                    scheduling info on skylake server
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: craig.topper at gmail.com
                CC: llvm-bugs at lists.llvm.org

I have trouble believing that 0 microops and no port binding is correct for
these.

def SKXWriteResGroup214 : SchedWriteRes<[]> {
  let Latency = 20;
  let NumMicroOps = 0;
}
def: InstRW<[SKXWriteResGroup214], (instregex "VGATHERDPSZ128rm")>;
def: InstRW<[SKXWriteResGroup214], (instregex "VGATHERQPSZrm")>;
def: InstRW<[SKXWriteResGroup214], (instregex "VPGATHERDDZ128rm")>;

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