[llvm-bugs] [Bug 34232] New: [X86][BMI2] Investigate uses of 32-bit MULX on x86_64

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=34232

            Bug ID: 34232
           Summary: [X86][BMI2] Investigate uses of 32-bit MULX on x86_64
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: llvm-dev at redking.me.uk
                CC: craig.topper at gmail.com, llvm-bugs at lists.llvm.org

We don't use MULX32 at all 64-bit targets. Not only do we miss avoiding
touching RFLAGS (which I don't think we make use of at all for
MULX/SARX/etc.?), but we miss opportunities such as:

uint32_t mulhi(uint32_t x, uint32_t y) {
  uint64_t xx = x;
  uint64_t yy = y;
  uint64_t rr = xx * yy;
  return (uint32_t)(rr >> 32);
}

define i32 @mulhi(i32, i32) {
  %3 = zext i32 %0 to i64
  %4 = zext i32 %1 to i64
  %5 = mul i64 %4, %3
  %6 = lshr i64 %5, 32
  %7 = trunc i64 %6 to i32
  ret i32 %7
}

haswell x86_64:

mulhi:
  movl %edi, %ecx
  movl %esi, %eax
  imulq %rcx, %rax
  shrq $32, %rax
  retq

haswell i686:

mulhi:
  movl 8(%esp), %edx
  mulxl 4(%esp), %ecx, %eax
  retl

In comparison, for MULX64:

define i64 @mulhi64(i32, i32) {
  %3 = zext i64 %0 to i128
  %4 = zext i64 %1 to i128
  %5 = mul i128 %4, %3
  %6 = lshr i128 %5, 32
  %7 = trunc i128 %6 to i64 
  ret i64 %7
}

mulhi64:
  movq %rdi, %rdx
  mulxq %rsi, %rcx, %rax
  retq

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