[llvm-bugs] [Bug 34217] New: [AVX] Compiler not folding per-element stores for 256-bit vectors into vmovups

via llvm-bugs llvm-bugs at lists.llvm.org
Wed Aug 16 18:18:43 PDT 2017


https://bugs.llvm.org/show_bug.cgi?id=34217

            Bug ID: 34217
           Summary: [AVX] Compiler not folding per-element stores for
                    256-bit vectors into vmovups
           Product: new-bugs
           Version: unspecified
          Hardware: PC
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: douglas_yung at playstation.sony.com
                CC: llvm-bugs at lists.llvm.org

After commit r310710, the compiler no longer seems to be folding per-element
stores for 256-bit vectors into a simple vmovups instruction when using AVX.

Consider the following code:

void foo(__m256i _v, int8_t * ptr) {
  __v32qi v = (__v32qi)_v;
  ptr[0] = v[0];
  ptr[1] = v[1];
  ptr[2] = v[2];
  ptr[3] = v[3];
  ptr[4] = v[4];
  ptr[5] = v[5];
  ptr[6] = v[6];
  ptr[7] = v[7];
  ptr[8] = v[8];
  ptr[9] = v[9];
  ptr[10] = v[10];
  ptr[11] = v[11];
  ptr[12] = v[12];
  ptr[13] = v[13];
  ptr[14] = v[14];
  ptr[15] = v[15];
  ptr[16] = v[16];
  ptr[17] = v[17];
  ptr[18] = v[18];
  ptr[19] = v[19];
  ptr[20] = v[20];
  ptr[21] = v[21];
  ptr[22] = v[22];
  ptr[23] = v[23];
  ptr[24] = v[24];
  ptr[25] = v[25];
  ptr[26] = v[26];
  ptr[27] = v[27];
  ptr[28] = v[28];
  ptr[29] = v[29];
  ptr[30] = v[30];
  ptr[31] = v[31];
}

Prior to r310710, when compiled with -O2 -mavx, the compiler would generate the
following single instruction:

vmovups %ymm0, (%rdi)

Starting with r310710 however, the compiler is now generating the following
much less efficient code:

    vpextrb    $0, %xmm0, (%rdi)
    vpextrb    $1, %xmm0, 1(%rdi)
    vpextrb    $2, %xmm0, 2(%rdi)
    vpextrb    $3, %xmm0, 3(%rdi)
    vpextrb    $4, %xmm0, 4(%rdi)
    vpextrb    $5, %xmm0, 5(%rdi)
    vpextrb    $6, %xmm0, 6(%rdi)
    vpextrb    $7, %xmm0, 7(%rdi)
    vpextrb    $8, %xmm0, 8(%rdi)
    vpextrb    $9, %xmm0, 9(%rdi)
    vpextrb    $10, %xmm0, 10(%rdi)
    vpextrb    $11, %xmm0, 11(%rdi)
    vpextrb    $12, %xmm0, 12(%rdi)
    vpextrb    $13, %xmm0, 13(%rdi)
    vpextrb    $14, %xmm0, 14(%rdi)
    vpextrb    $15, %xmm0, 15(%rdi)
    vextractf128    $1, %ymm0, %xmm0
    vpextrb    $0, %xmm0, 16(%rdi)
    vpextrb    $1, %xmm0, 17(%rdi)
    vpextrb    $2, %xmm0, 18(%rdi)
    vpextrb    $3, %xmm0, 19(%rdi)
    vpextrb    $4, %xmm0, 20(%rdi)
    vpextrb    $5, %xmm0, 21(%rdi)
    vpextrb    $6, %xmm0, 22(%rdi)
    vpextrb    $7, %xmm0, 23(%rdi)
    vpextrb    $8, %xmm0, 24(%rdi)
    vpextrb    $9, %xmm0, 25(%rdi)
    vpextrb    $10, %xmm0, 26(%rdi)
    vpextrb    $11, %xmm0, 27(%rdi)
    vpextrb    $12, %xmm0, 28(%rdi)
    vpextrb    $13, %xmm0, 29(%rdi)
    vpextrb    $14, %xmm0, 30(%rdi)
    vpextrb    $15, %xmm0, 31(%rdi)

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