[llvm-bugs] [Bug 32540] New: Compiler generating extra debug location for btver2 target
via llvm-bugs
llvm-bugs at lists.llvm.org
Wed Apr 5 11:55:15 PDT 2017
http://bugs.llvm.org/show_bug.cgi?id=32540
Bug ID: 32540
Summary: Compiler generating extra debug location for btver2
target
Product: new-bugs
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: enhancement
Priority: P
Component: new bugs
Assignee: unassignedbugs at nondot.org
Reporter: douglas_yung at playstation.sony.com
CC: llvm-bugs at lists.llvm.org
The compiler seems to be generating an extra debug location when compiling the
following code for the btver2 target. Consider the following code:
struct alpha {
long bravo;
long charlie;
};
extern int delta(int, unsigned int, unsigned long, double);
extern int echo(struct alpha *);
void foxtrot()
{
unsigned int gulf = 100;
struct alpha india, juliet;
unsigned long hotel = 1;
echo(&india);
echo(&juliet);
double kilo = (((double)juliet.bravo +
((double)juliet.charlie/1000000.0)) - ((double)india.bravo +
((double)india.charlie/1000000.0))); // Line 17
delta(0, gulf, hotel, (1.0 / (1024.0 *
1024.0))*(double)gulf*(double)hotel/kilo); // Line 18
}
If you compile it to assembly using the command "clang -cc1 -triple
x86_64-unknown-linux-gnu -S -masm-verbose -target-cpu btver2
-debug-info-kind=limited -O0 repro.c", it generates the following assembly for
lines 17 and 18:
.loc 1 17 0 # repro.c:17:0
# implicit-def: %XMM0
vcvtsi2sdq 32(%rsp), %xmm0, %xmm0
# implicit-def: %XMM1
vcvtsi2sdq 40(%rsp), %xmm1, %xmm1
vmovsd .LCPI0_0(%rip), %xmm2 # xmm2 = mem[0],zero
vdivsd %xmm2, %xmm1, %xmm1
vaddsd %xmm1, %xmm0, %xmm0
# implicit-def: %XMM1
vcvtsi2sdq 48(%rsp), %xmm1, %xmm1
# implicit-def: %XMM3
vcvtsi2sdq 56(%rsp), %xmm3, %xmm3
vdivsd %xmm2, %xmm3, %xmm2
vaddsd %xmm2, %xmm1, %xmm1
vsubsd %xmm1, %xmm0, %xmm0
vmovsd %xmm0, 16(%rsp)
.loc 1 18 0 # repro.c:18:0
movl 68(%rsp), %ecx
movl %ecx, %edi
movl %edi, %ecx
movq 24(%rsp), %rdx
.loc 1 17 0 # repro.c:17:0
# implicit-def: %XMM0
.loc 1 18 0 # repro.c:18:0
vcvtsi2sdq %rdi, %xmm0, %xmm0
vmovsd .LCPI0_1(%rip), %xmm1 # xmm1 = mem[0],zero
vmulsd %xmm1, %xmm0, %xmm0
vmovq %rdx, %xmm1
vmovdqa .LCPI0_2(%rip), %xmm2 # xmm2 = [1127219200,1160773632,0,0]
vpunpckldq %xmm2, %xmm1, %xmm1 # xmm1 =
xmm1[0],xmm2[0],xmm1[1],xmm2[1]
vmovapd .LCPI0_3(%rip), %xmm2 # xmm2 = [4.503600e+15,1.934281e+25]
vsubpd %xmm2, %xmm1, %xmm1
vhaddpd %xmm1, %xmm1, %xmm1
vmulsd %xmm1, %xmm0, %xmm0
vdivsd 16(%rsp), %xmm0, %xmm0
movl 12(%rsp), %edi # 4-byte Reload
movl %ecx, %esi
movl %eax, 4(%rsp) # 4-byte Spill
callq delta at PLT
Note that it contains an extra debug location for line 17 of repro.c between
two debug locations for line 18. For comparison, if you build the same source,
but do not specify the btver2 target, the following assembly is generated
instead:
.loc 1 17 0 # repro.c:17:0
cvtsi2sdq 32(%rsp), %xmm0
cvtsi2sdq 40(%rsp), %xmm1
movsd .LCPI0_0(%rip), %xmm2 # xmm2 = mem[0],zero
divsd %xmm2, %xmm1
addsd %xmm1, %xmm0
cvtsi2sdq 48(%rsp), %xmm1
cvtsi2sdq 56(%rsp), %xmm3
divsd %xmm2, %xmm3
addsd %xmm3, %xmm1
subsd %xmm1, %xmm0
movsd %xmm0, 16(%rsp)
.loc 1 18 0 # repro.c:18:0
movl 68(%rsp), %ecx
movl %ecx, %edi
movl %edi, %ecx
movq 24(%rsp), %rdx
cvtsi2sdq %rdi, %xmm0
movsd .LCPI0_1(%rip), %xmm1 # xmm1 = mem[0],zero
mulsd %xmm1, %xmm0
movd %rdx, %xmm1
movaps .LCPI0_2(%rip), %xmm2 # xmm2 = [1127219200,1160773632,0,0]
punpckldq %xmm2, %xmm1 # xmm1 =
xmm1[0],xmm2[0],xmm1[1],xmm2[1]
movapd .LCPI0_3(%rip), %xmm2 # xmm2 = [4.503600e+15,1.934281e+25]
subpd %xmm2, %xmm1
pshufd $78, %xmm1, %xmm2 # xmm2 = xmm1[2,3,0,1]
addpd %xmm1, %xmm2
mulsd %xmm2, %xmm0
divsd 16(%rsp), %xmm0
movl 12(%rsp), %edi # 4-byte Reload
movl %ecx, %esi
movl %eax, 4(%rsp) # 4-byte Spill
callq delta at PLT
This does not contain the additional debug location list.
These examples were generated using a compiler built from r299417.
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