[llvm-bugs] [Bug 32532] New: Too many scalar dependencies in loops with load-hoisted bounds
via llvm-bugs
llvm-bugs at lists.llvm.org
Wed Apr 5 02:41:48 PDT 2017
http://bugs.llvm.org/show_bug.cgi?id=32532
Bug ID: 32532
Summary: Too many scalar dependencies in loops with
load-hoisted bounds
Product: Polly
Version: unspecified
Hardware: All
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Optimizer
Assignee: polly-dev at googlegroups.com
Reporter: llvm at meinersbur.de
CC: llvm-bugs at lists.llvm.org
Created attachment 18227
--> http://bugs.llvm.org/attachment.cgi?id=18227&action=edit
reduction_looprotate_loadhoist.ll
The attached file reduction_looprotate_loadhoist.ll has too many scalar
dependencies. In particular, it passes the loop induction variable %i as scalar
accesses even though the loop induction variable will be generated by
IslNodeBuilder and the old value is never referenced.
$ opt reduction_looprotate_loadhoist.ll -polly-process-unprofitable
-polly-invariant-load-hoisting -polly-scops -analyze
Statements {
Stmt_reduction_preheader
Domain :=
[Start] -> { Stmt_reduction_preheader[i0] : 0 <= i0 <= 1 };
Schedule :=
[Start] -> { Stmt_reduction_preheader[i0] -> [i0, 0, 0, 0] };
MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
[Start] -> { Stmt_reduction_preheader[i0] -> MemRef_i__phi[] };
MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
[Start] -> { Stmt_reduction_preheader[i0] -> MemRef_phi__phi[]
};
Stmt_reduction_for
Domain :=
[Start] -> { Stmt_reduction_for[i0, i1] : 0 <= i0 <= 1 and 0 <
i1 <= 3 - Start; Stmt_reduction_for[i0, 0] : 0 <= i0 <= 1 };
Schedule :=
[Start] -> { Stmt_reduction_for[i0, i1] -> [i0, 1, i1, 0] : 0 <
i1 <= 3 - Start; Stmt_reduction_for[i0, 0] -> [i0, 1, 0, 0] };
ReadAccess := [Reduction Type: NONE] [Scalar: 1]
[Start] -> { Stmt_reduction_for[i0, i1] -> MemRef_i__phi[] };
ReadAccess := [Reduction Type: NONE] [Scalar: 1]
[Start] -> { Stmt_reduction_for[i0, i1] -> MemRef_phi__phi[] };
MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
[Start] -> { Stmt_reduction_for[i0, i1] -> MemRef_phi[] };
MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
[Start] -> { Stmt_reduction_for[i0, i1] -> MemRef_i[] };
Stmt_body
Domain :=
[Start] -> { Stmt_body[i0, i1] : 0 <= i0 <= 1 and 0 < i1 <= 3 -
Start; Stmt_body[i0, 0] : 0 <= i0 <= 1 };
Schedule :=
[Start] -> { Stmt_body[i0, i1] -> [i0, 1, i1, 1] : 0 < i1 <= 3
- Start; Stmt_body[i0, 0] -> [i0, 1, 0, 1] };
MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
[Start] -> { Stmt_body[i0, i1] -> MemRef_mul[] };
ReadAccess := [Reduction Type: NONE] [Scalar: 1]
[Start] -> { Stmt_body[i0, i1] -> MemRef_phi[] };
Stmt_reduction_inc
Domain :=
[Start] -> { Stmt_reduction_inc[i0, i1] : 0 <= i0 <= 1 and 0 <
i1 <= 3 - Start; Stmt_reduction_inc[i0, 0] : 0 <= i0 <= 1 };
Schedule :=
[Start] -> { Stmt_reduction_inc[i0, i1] -> [i0, 1, i1, 2] : 0 <
i1 <= 3 - Start; Stmt_reduction_inc[i0, 0] -> [i0, 1, 0, 2] };
MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
[Start] -> { Stmt_reduction_inc[i0, i1] -> MemRef_i__phi[] };
ReadAccess := [Reduction Type: NONE] [Scalar: 1]
[Start] -> { Stmt_reduction_inc[i0, i1] -> MemRef_mul[] };
MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
[Start] -> { Stmt_reduction_inc[i0, i1] -> MemRef_phi__phi[] };
ReadAccess := [Reduction Type: NONE] [Scalar: 1]
[Start] -> { Stmt_reduction_inc[i0, i1] -> MemRef_i[] };
Stmt_reduction_exit
Domain :=
[Start] -> { Stmt_reduction_exit[i0] : 0 <= i0 <= 1 };
Schedule :=
[Start] -> { Stmt_reduction_exit[i0] -> [i0, 2, 0, 0] };
MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
[Start] -> { Stmt_reduction_exit[i0] -> MemRef_A[i0] };
ReadAccess := [Reduction Type: NONE] [Scalar: 1]
[Start] -> { Stmt_reduction_exit[i0] -> MemRef_mul[] };
}
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