[llvm-bugs] [Bug 30524] New: [mc][gfx8] Many f16 insns do not support VOP3 encoding

[via llvm-bugs]

https://llvm.org/bugs/show_bug.cgi?id=30524

            Bug ID: 30524
           Summary: [mc][gfx8] Many f16 insns do not support VOP3 encoding
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: AMDGPU
          Assignee: unassignedbugs at nondot.org
          Reporter: artem.tamazov at amd.com
                CC: andrey.kasaurov at gmail.com, artem.tamazov at amd.com,
                    llvm-bugs at lists.llvm.org, nikolay.haustov at amd.com,
                    sam.kolton at amd.com, valery.pykhtin at gmail.com
    Classification: Unclassified

Created attachment 17349
  --> https://llvm.org/bugs/attachment.cgi?id=17349&action=edit
00022.tests_tg_gfx8_asm_lit1_bug.06.24.F16-VOP3-MUST-FAIL.zip

The following instructions do not have e64 (VOP3) encoding:
> v_add_f16
> v_ceil_f16
> v_cos_f16
> v_exp_f16
> v_fract_f16
> v_cvt_i16_f16
> v_frexp_exp_i16_f16
> v_frexp_mant_f16
> v_ldexp_f16
> v_log_f16
> v_mac_f16
> v_max_f16
> v_min_f16
> v_mul_f16
> v_rcp_f16
> v_rndne_f16
> v_rsq_f16
> v_sin_f16
> v_sqrt_f16
> v_sub_f16
> v_subrev_f16
> v_trunc_f16

Assembly of these instructions with enforced e64 encoding should lead to
errors.
Subsequently, output and input modifiers are not supported as well and should
lead to errors.

Tested with r282249 (git# 3b62127, 2016-09-23 16:35:43 +0300).

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