[llvm-bugs] [Bug 30503] New: SSE instructions are generated with SSE disabled

[via llvm-bugs]

https://llvm.org/bugs/show_bug.cgi?id=30503

            Bug ID: 30503
           Summary: SSE instructions are generated with SSE disabled
           Product: libraries
           Version: 3.9
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: simonas+llvm.org at kazlauskas.me
                CC: llvm-bugs at lists.llvm.org
    Classification: Unclassified

Compiling 

    target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
    target triple = "x86_64-unknown-linux-gnu"

    ; Function Attrs: uwtable
    define internal i64 @banana() unnamed_addr #0 {
    entry-block:
      ret i64 0
    }

    ; Function Attrs: nounwind uwtable
    define x86_64_win64cc i64 @peach() unnamed_addr #1 {
    entry-block:
      %0 = call i64 @banana()
      ret i64 %0
    }

    attributes #0 = { uwtable }
    attributes #1 = { nounwind uwtable }

with `llc test.ll -mattr="-sse,-mmx,+soft_float" -filetype=asm -o -` produces
assembly which contains SSE (movaps) instructions, despite SSE being disabled:

    peach:                                  # @peach
        .cfi_startproc
    # BB#0:                                 # %entry-block
        pushq    %rsi
    .Ltmp0:
        .cfi_def_cfa_offset 16
        pushq    %rdi
    .Ltmp1:
        .cfi_def_cfa_offset 24
        subq    $168, %rsp
        movaps    %xmm15, 144(%rsp)       # 16-byte Spill
        movaps    %xmm14, 128(%rsp)       # 16-byte Spill
        movaps    %xmm13, 112(%rsp)       # 16-byte Spill
        movaps    %xmm12, 96(%rsp)        # 16-byte Spill
    # and so forth

Issue is present in 3.8 as well.

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