[llvm-bugs] [Bug 31164] New: x64 backend creates unnecessary setcc instructions

[via llvm-bugs]

https://llvm.org/bugs/show_bug.cgi?id=31164

            Bug ID: 31164
           Summary: x64 backend creates unnecessary setcc instructions
           Product: tools
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: llc
          Assignee: unassignedbugs at nondot.org
          Reporter: erik at arbat.com
                CC: llvm-bugs at lists.llvm.org
    Classification: Unclassified

An i1 phi is cleverly placed in the processor status word, but then when we
want to branch on it, it is materialized in a setcc-testb-je sequence instead
of just a jne instruction.

Input .ll:

define i64 @foo(i64, i64, i64) {
  %4 = icmp eq i64 %0, 0
  br i1 %4, label %left, label %right

left:
  %l = icmp eq i64 %1, 1
  br label %join

right:
  %r = icmp eq i64 %1, %2
  br label %join

join:
  %lr = phi i1 [%l, %left], [%r, %right]
  %iszero = icmp eq i1 %lr, 0
  br i1 %iszero, label %left2, label %right2

left2:
  ret i64 %2

right2:
  ret i64 %0
}

Output x64

foo:                                    # @foo
    .cfi_startproc
# BB#0:
    testq   %rdi, %rdi
    je  .LBB0_1
# BB#2:                                 # %right
    cmpq    %rdx, %rsi
    jmp .LBB0_3
.LBB0_1:                                # %left
    cmpq    $1, %rsi
.LBB0_3:                                # %join
    sete    %al
    testb   %al, %al
    je  .LBB0_4
# BB#5:                                 # %right2
    movq    %rdi, %rax
    retq
.LBB0_4:                                # %left2
    movq    %rdx, %rax
    retq

See http://pastebin.com/UinMkFr1 and http://pastebin.com/Su1b1mxj for syntax
coloured versions.

The sete and testb instructions are superfluous.

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