[llvm-bugs] [Bug 31124] New: superlinear time in ARM instruction selection
via llvm-bugs
llvm-bugs at lists.llvm.org
Tue Nov 22 13:45:50 PST 2016
https://llvm.org/bugs/show_bug.cgi?id=31124
Bug ID: 31124
Summary: superlinear time in ARM instruction selection
Product: libraries
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: Backend: ARM
Assignee: unassignedbugs at nondot.org
Reporter: nlewycky at google.com
CC: llvm-bugs at lists.llvm.org
Classification: Unclassified
I have a testcase which looks like this:
void iTLB_bechmark_function() {
int a = 0, b = 0;
a = b + 1;
b = a + 1;
a = b + 1;
b = a + 1;
a = b + 1;
b = a + 1;
a = b + 1;
b = a + 1;
// ...
b = a + 1;
a = b + 1;
b = a + 1;
a = b + 1;
b = a + 1;
a = b + 1;
b = a + 1;
a = b + 1;
b = a + 1;
}
The unreduced testcase is 524291 lines long. With "clang -target
thumbv7-linux-gnueabi -S -o /dev/null iTLB_short.c -mthumb -ftime-report" we
can see that the ARM instruction selection is superlinear.
---User Time--- --System Time-- --User+System-- ---Wall Time--- ---
Name ---
At 100 lines:
0.0210 ( 68.7%) 0.0002 ( 54.8%) 0.0212 ( 68.6%) 0.0220 ( 70.2%) ARM
Instruction Selection
At 1000 lines:
0.2021 ( 78.8%) 0.0034 (100.0%) 0.2055 ( 79.1%) 0.2060 ( 79.3%) ARM
Instruction Selection
At 10000 lines:
8.0935 ( 93.9%) 0.0120 (100.0%) 8.1055 ( 93.9%) 8.1029 ( 93.9%) ARM
Instruction Selection
At 100000 lines:
1541.2256 ( 99.7%) 0.7040 ( 97.2%) 1541.9296 ( 99.7%) 1541.8429 ( 99.7%)
ARM Instruction Selection
Version: clang version 4.0.0 (trunk 287592) (llvm/trunk 287591)
Here's a sample backtrace:
#0 0x0000000001ca3d9c in llvm::SDNode::getOpcode (this=0x1113c400) at
/usr/local/google/home/nlewycky/llvm/src/include/llvm/CodeGen/SelectionDAGNodes.h:541
#1 0x00000000040c195c in (anonymous
namespace)::DAGCombiner::CombineToPostIndexedLoadStore (this=0x7fffffffa930,
N=0x10fa9710) at
/usr/local/google/home/nlewycky/llvm/src/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:10090
#2 0x00000000040c3409 in (anonymous namespace)::DAGCombiner::visitLOAD
(this=0x7fffffffa930, N=0x10fa9710) at
/usr/local/google/home/nlewycky/llvm/src/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:10333
#3 0x0000000004083a03 in (anonymous namespace)::DAGCombiner::visit
(this=0x7fffffffa930, N=0x10fa9710) at
/usr/local/google/home/nlewycky/llvm/src/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1459
#4 0x0000000004083bad in (anonymous namespace)::DAGCombiner::combine
(this=0x7fffffffa930, N=0x10fa9710) at
/usr/local/google/home/nlewycky/llvm/src/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1480
#5 0x0000000004082f9c in (anonymous namespace)::DAGCombiner::Run
(this=0x7fffffffa930, AtLevel=llvm::AfterLegalizeDAG) at
/usr/local/google/home/nlewycky/llvm/src/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1334
#6 0x00000000040e2ce6 in llvm::SelectionDAG::Combine (this=0xdd44020,
Level=llvm::AfterLegalizeDAG, AA=..., OptLevel=llvm::CodeGenOpt::None) at
/usr/local/google/home/nlewycky/llvm/src/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:15464
#7 0x00000000041c91eb in llvm::SelectionDAGISel::CodeGenAndEmitDAG
(this=0xa71ae10) at
/usr/local/google/home/nlewycky/llvm/src/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:844
#8 0x00000000041c7e18 in llvm::SelectionDAGISel::SelectBasicBlock
(this=0xa71ae10, Begin=..., End=..., HadTailCall=@0x7fffffffb010: false) at
/usr/local/google/home/nlewycky/llvm/src/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:683
#9 0x00000000041cc592 in llvm::SelectionDAGISel::SelectAllBasicBlocks
(this=0xa71ae10, Fn=...) at
/usr/local/google/home/nlewycky/llvm/src/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1558
#10 0x00000000041c6d04 in llvm::SelectionDAGISel::runOnMachineFunction
(this=0xa71ae10, mf=...) at
/usr/local/google/home/nlewycky/llvm/src/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:504
#11 0x00000000020b2ab4 in (anonymous
namespace)::ARMDAGToDAGISel::runOnMachineFunction (this=0xa71ae10, MF=...) at
/usr/local/google/home/nlewycky/llvm/src/lib/Target/ARM/ARMISelDAGToDAG.cpp:69
[...]
I don't know why, but it's only superlinear with arm+thumb, not on arm or on
x86.
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