[llvm-bugs] [Bug 27718] New: PowerPC64: Simple floating point code hits machine verifier failure

[via llvm-bugs]

https://llvm.org/bugs/show_bug.cgi?id=27718

            Bug ID: 27718
           Summary: PowerPC64: Simple floating point code hits machine
                    verifier failure
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: PowerPC
          Assignee: unassignedbugs at nondot.org
          Reporter: anton at samba.org
                CC: llvm-bugs at lists.llvm.org
    Classification: Unclassified

The following testcase:

void fn1(void) { float a = 1; }

when built with:

clang -c -O0 -mllvm -verify-machineinstrs /tmp/testcase.c

hits a machine verifier failure:

# After Instruction Selection
# Machine code for function fn1: Properties: <>
Frame Objects:
  fi#0: size=4, align=4, at location [SP]
Constant Pool:
  cp#0: 1.000000e+00, align=4

BB#0: derived from LLVM BB %0
    %vreg1<def> = ADDIStocHA %X2, <cp#0>; G8RC_and_G8RC_NOX0:%vreg1
    %vreg0<def> = LFS <cp#0>[TF=112], %vreg1; mem:LD4[ConstantPool]
VSSRC:%vreg0 G8RC_and_G8RC_NOX0:%vreg1
    %vreg2<def> = LIS 16256; GPRC:%vreg2
    STW %vreg2<kill>, 0, <fi#0>; mem:ST4[%1] GPRC:%vreg2
    BLR8 %LR8<imp-use>, %RM<imp-use>

# End machine code for function fn1.

*** Bad machine code: Illegal virtual register for instruction ***
- function:    fn1
- basic block: BB#0  (0x1000ef8b780)
- instruction: %vreg0<def> = LFS
- operand 0:   %vreg0<def>
Expected a F4RC register, but got a VSSRC register
fatal error: error in backend: Found 1 machine code errors.

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