[llvm-bugs] [Bug 27600] New: Bugs in handling of i1 vectors + memory

[via llvm-bugs]

https://llvm.org/bugs/show_bug.cgi?id=27600

            Bug ID: 27600
           Summary: Bugs in handling of i1 vectors + memory
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: Common Code Generator Code
          Assignee: unassignedbugs at nondot.org
          Reporter: fraser at codeplay.com
                CC: llvm-bugs at lists.llvm.org
    Classification: Unclassified

I've come across several problems in the treatment of i1 vectors in expansion
and DAG combining code.

They, so far, all concern the assumption that vector element types are of size
> 1 byte.

The first few are in the expansion of build/extract/insert vector when
expanding through the stack:


SDValue SelectionDAGLegalize::ExpandVectorBuildThroughStack(SDNode* Node) {
  unsigned TypeByteSize = EltVT.getSizeInBits() / 8; -- Zero

  for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) {
    unsigned Offset = TypeByteSize*i; // Always zero!


This means the offset from the stack is always 0, hence it'll load the wrong
element.

Same goes with ExpandExtractFromVectorThroughStack and
ExpandInsertToVectorThroughStack, from what I can see by reading the code.

Also buggy is DAGCombiner::ReplaceExtractVectorEltOfLoadWithNarrowedLoad. Same
problem - offsets of zero, combining to incorrect DAG result.

I haven't seen any more just yet, but I'll update this issue tracker if I find
more.

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