[llvm-bugs] [Bug 26819] New: [aarch64] optimize obscured vector integer comparisons against zero

[via llvm-bugs]

https://llvm.org/bugs/show_bug.cgi?id=26819

            Bug ID: 26819
           Summary: [aarch64] optimize obscured vector integer comparisons
                    against zero
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: AArch64
          Assignee: unassignedbugs at nondot.org
          Reporter: spatel+llvm at rotateright.com
                CC: llvm-bugs at lists.llvm.org
    Classification: Unclassified

I think the AArch64 backend is missing a couple of folds related to vector
integer comparisons ( related x86 bug: bug 26701 ). 

I'm not sure why anyone would write NEON code like this, but it could happen?

// Are elements of 'a' > -1? Ie, is 'a' positive?
int32x2_t test_vcgt_s32(int32x2_t a) {
  return vcgt_s32(a, vceq_s32(a, a));
}

$ ./clang -O1 ...
test_vcge_s32:
    sshr    v0.2s, v0.2s, #31
    mvn     v0.8b, v0.8b
    ret

The IR is optimized from a compare+sext to a shift+not in InstCombine.

But this can be optimized to: is 'a' >= 0?
So is this the optimal codegen?
    cmge    v0.2s, v0.2s, #0
    ret

Similarly, for:

// Are elements of 'a' <= -1? Ie, is 'a' negative?
int32x2_t test_vcle_s32(int32x2_t a) {
  return vcle_s32(a, vceq_s32(a, a) );
}

$ ./clang -O1 ...
test_vcle_s32:
    movi    d1, #0xffffffffffffffff
    cmge    v0.2s, v1.2s, v0.2s
    ret

Should this be:
    cmlt    v0.2s, v0.2s, #0
    ret

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