[llvm-bugs] [Bug 28206] New: [mc] Some i/u/b64 insns -- floating inline const lead to assert.

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https://llvm.org/bugs/show_bug.cgi?id=28206

            Bug ID: 28206
           Summary: [mc] Some i/u/b64 insns -- floating inline const lead
                    to assert.
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: AMDGPU
          Assignee: artem.tamazov at amd.com
          Reporter: artem.tamazov at amd.com
                CC: llvm-bugs at lists.llvm.org, nikolay.haustov at amd.com
    Classification: Unclassified

Created attachment 16590
  --> https://llvm.org/bugs/attachment.cgi?id=16590&action=edit
02151.tests_tg_gfx7_asm_lit1_bug.06.08.min.v_ashr_etc_x64-fconst_assert.zip

Example of failing instruction:
> v_ashr_i64 v[0:1], 0.5, s0

0.5 can be encoded inline and thus shall be processed this way in spite of that
instruction operand is I64. Moreover, it is worth to encode values like
0x3fe0000000000000 (bitwise representation of double 0.5) as inline constants.

Only values which can't be encoded inline (e.g. 0.1) should lead to assembly
errors.

Tested with r272673 (git # da10a460d7c98278561225fda90855b303675f35)

Lit tests attached.

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