[llvm-bugs] [Bug 28727] New: PowerPC - bug in generation of @ha/@l pair for symbol+addend

[via llvm-bugs]

https://llvm.org/bugs/show_bug.cgi?id=28727

            Bug ID: 28727
           Summary: PowerPC - bug in generation of @ha/@l pair for
                    symbol+addend
           Product: new-bugs
           Version: 3.8
          Hardware: Other
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: eric.schweitz at pgroup.com
                CC: llvm-bugs at lists.llvm.org
    Classification: Unclassified

Created attachment 16815
  --> https://llvm.org/bugs/attachment.cgi?id=16815&action=edit
reduced bitcode file

When the attached example is assembled by llc, as in,

  % llc -O2 -disable-ppc-vsx-fma-mutation reduced.bc -o buggy.s

We can look at the high-adjusted and low relocation notations in the assembly
and see that some of the pairings do not match. In this partial list,

        addis 14, 2, z00cb at toc@ha
        lwa 4, z00cb at toc@l+8(14)
        stw 5, z00cb at toc@l+20(14)
        lwz 5, z00cb at toc@l+20(14)

we see that the high adjusted value of z00cb has no addend, but there are
several low subsequent notations that do have addends (of 8 and 20). This has
resulted in some hard to diagnose, hard to reproduce failures on OpenPOWER.

We believe, after reviewing "Power Architecture 64-Bit ELF V2 ABI
Specification", that this code-gen pattern is simply incorrect. The linker
cannot correctly generate a high adjusted value near a 16-bit boundary without
also knowing and accounting for all used addend values. Some may wrap and some
may not. Specifically then, the @ha and @l notations must be exactly paired.

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