[llvm-bugs] [Bug 29078] New: [X86][SSE] Failure to recognise i64 sitofp conversions can be performed as i32

[via llvm-bugs]

https://llvm.org/bugs/show_bug.cgi?id=29078

            Bug ID: 29078
           Summary: [X86][SSE] Failure to recognise i64 sitofp conversions
                    can be performed as i32
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: llvm-dev at redking.me.uk
                CC: llvm-bugs at lists.llvm.org
    Classification: Unclassified

i64 to f32/f64 sitofp conversions must be performed using gpr source registers,
requiring costly vector/scalar register moves. But if we know that the integers
are within the i32 range then we should be able to use the faster
cvtdq2ps/cvtdq2pd instructions (via suitable truncation/shuffles).

This might be worth performing in DAGCombine, but for now I'm suggesting it
just as a x86 optimization.

define <2 x double> @mask_scvt_2i64_2f64(<2 x i64> %a) {
  %and = and <2 x i64> %a, <i64 255, i64 255>
  %cvt = sitofp <2 x i64> %and to <2 x double>
  ret <2 x double> %cvt
}

define <4 x float> @mask_scvt_4i64_4f32(<4 x i64> %a) {
  %and = and <4 x i64> %a, <i64 255, i64 255, i64 255, i64 255>
  %cvt = sitofp <4 x i64> %and to <4 x float>
  ret <4 x float> %cvt
}

define <2 x double> @clamp_scvt_2i64_2f64(<2 x i64> %a) {
  %clo = icmp slt <2 x i64> %a, <i64 -255, i64 -255>
  %lo = select <2 x i1> %clo, <2 x i64> <i64 -255, i64 -255>, <2 x i64> %a
  %chi = icmp sgt <2 x i64> %lo, <i64 255, i64 255>
  %hi = select <2 x i1> %chi, <2 x i64> <i64 255, i64 255>, <2 x i64> %lo
  %cvt = sitofp <2 x i64> %hi to <2 x double>
  ret <2 x double> %cvt
}

"~/LLVM/build/bin/llc -mcpu=btver2"

_mask_scvt_2i64_2f64:
        vpand   LCPI0_0(%rip), %xmm0, %xmm0
        vpextrq $1, %xmm0, %rax
        vmovq   %xmm0, %rcx
        vcvtsi2sdq      %rax, %xmm1, %xmm1
        vcvtsi2sdq      %rcx, %xmm2, %xmm0
        vunpcklpd       %xmm1, %xmm0, %xmm0 ## xmm0 = xmm0[0],xmm1[0]
        retq

_mask_scvt_4i64_4f32:
        vandps  LCPI1_0(%rip), %ymm0, %ymm0
        vpextrq $1, %xmm0, %rax
        vmovq   %xmm0, %rdx
        vcvtsi2ssq      %rax, %xmm1, %xmm1
        vcvtsi2ssq      %rdx, %xmm2, %xmm2
        vextractf128    $1, %ymm0, %xmm0
        vmovq   %xmm0, %rax
        vpextrq $1, %xmm0, %rcx
        vinsertps       $16, %xmm1, %xmm2, %xmm1 ## xmm1 =
xmm2[0],xmm1[0],xmm2[2,3]
        vcvtsi2ssq      %rax, %xmm3, %xmm2
        vcvtsi2ssq      %rcx, %xmm3, %xmm0
        vinsertps       $32, %xmm2, %xmm1, %xmm1 ## xmm1 =
xmm1[0,1],xmm2[0],xmm1[3]
        vinsertps       $48, %xmm0, %xmm1, %xmm0 ## xmm0 = xmm1[0,1,2],xmm0[0]
        retq

_clamp_scvt_2i64_2f64:
        vmovdqa LCPI2_0(%rip), %xmm1    ## xmm1 =
[18446744073709551361,18446744073709551361]
        vpcmpgtq        %xmm0, %xmm1, %xmm2
        vblendvpd       %xmm2, %xmm1, %xmm0, %xmm0
        vmovdqa LCPI2_1(%rip), %xmm1    ## xmm1 = [255,255]
        vpcmpgtq        %xmm1, %xmm0, %xmm2
        vblendvpd       %xmm2, %xmm1, %xmm0, %xmm0
        vpextrq $1, %xmm0, %rax
        vmovq   %xmm0, %rcx
        vcvtsi2sdq      %rax, %xmm3, %xmm1
        vcvtsi2sdq      %rcx, %xmm3, %xmm0
        vunpcklpd       %xmm1, %xmm0, %xmm0 ## xmm0 = xmm0[0],xmm1[0]
        retq

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