[llvm-bugs] [Bug 28818] New: powerpc64le: Cannot select AtomicLoadMin
via llvm-bugs
llvm-bugs at lists.llvm.org
Tue Aug 2 06:46:15 PDT 2016
https://llvm.org/bugs/show_bug.cgi?id=28818
Bug ID: 28818
Summary: powerpc64le: Cannot select AtomicLoadMin
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: Backend: PowerPC
Assignee: unassignedbugs at nondot.org
Reporter: acjacob at us.ibm.com
CC: llvm-bugs at lists.llvm.org
Classification: Unclassified
Created attachment 16863
--> https://llvm.org/bugs/attachment.cgi?id=16863&action=edit
IR that fails to compile through the ppc64le backend.
When compiling the following OpenMP code with a min (or max)-reduction I get a
backend failure with ppc64le because the backend cannot select for LLVM IR
'atomicrmw min'.
#include <stdio.h>
#include <omp.h>
int main(int argc, char *argv[]) {
int A[2048];
int n = 2048;
for (int i = 0; i < n; i++)
A[i] = i+1;
int minimum=0;
#pragma omp parallel reduction(min:minimum)
{
minimum += 1;
}
printf ("Min=%d\n", minimum);
return 0;
}
The OpenMP Clang processing generates an 'atomicrmw min' instruction when
codegen'ing for the reduction clause.
%14 = atomicrmw min i32* %0, i32 %13 monotonic
When passing this through the backend I get a failure with the message:
fatal error: error in backend: Cannot select: t7: i32,ch =
AtomicLoadMin<Volatile LDST4[%minimum]> t4:1, t6, t4
t6: i64,ch = CopyFromReg t0, Register:i64 %vreg3
t5: i64 = Register %vreg3
t4: i32,ch = load<LD4[%minimum1](tbaa=<0x1001197c308>)> t0,
FrameIndex:i64<0>, undef:i64
t1: i64 = FrameIndex<0>
t3: i64 = undef
In function: .omp_outlined.
I have attached the LLVM IR file with this bug report. Please let me know if
you need anything else.
Thanks in advance for your time.
Arpith
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