[llvm-bugs] [Bug 24654] New: [x86] consecutive store merging failure
via llvm-bugs
llvm-bugs at lists.llvm.org
Tue Sep 1 09:33:59 PDT 2015
https://llvm.org/bugs/show_bug.cgi?id=24654
Bug ID: 24654
Summary: [x86] consecutive store merging failure
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: Backend: X86
Assignee: unassignedbugs at nondot.org
Reporter: spatel+llvm at rotateright.com
CC: llvm-bugs at lists.llvm.org
Classification: Unclassified
$ cat merge.ll
define void @merge_8_float_zero_stores(float* %ptr) {
%idx0 = getelementptr float, float* %ptr, i64 0
%idx1 = getelementptr float, float* %ptr, i64 1
%idx2 = getelementptr float, float* %ptr, i64 2
%idx3 = getelementptr float, float* %ptr, i64 3
%idx4 = getelementptr float, float* %ptr, i64 4
%idx5 = getelementptr float, float* %ptr, i64 5
%idx6 = getelementptr float, float* %ptr, i64 6
%idx7 = getelementptr float, float* %ptr, i64 7
store float 0.0, float* %idx0, align 4
store float 0.0, float* %idx1, align 4
store float 0.0, float* %idx2, align 4
store float 0.0, float* %idx3, align 4
store float 0.0, float* %idx4, align 4
store float 0.0, float* %idx5, align 4
store float 0.0, float* %idx6, align 4
store float 0.0, float* %idx7, align 4
ret void
}
I think this should be an xor to generate the zero and one 32-byte AVX store,
but:
$ ./llc -o - merge.ll -mattr=avx
...
movl $0, (%rdi)
movl $0, 4(%rdi)
movl $0, 8(%rdi)
movl $0, 12(%rdi)
movl $0, 16(%rdi)
movl $0, 20(%rdi)
movq $0, 24(%rdi) <--- six 4-byte stores and one 8-byte store?!
retq
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