[llvm-bugs] [Bug 25263] New: LiveIn lists for MBBs are incorrect

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https://llvm.org/bugs/show_bug.cgi?id=25263

            Bug ID: 25263
           Summary: LiveIn lists for MBBs are incorrect
           Product: clang
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: LLVM Codegen
          Assignee: unassignedclangbugs at nondot.org
          Reporter: paulsson at linux.vnet.ibm.com
                CC: llvm-bugs at lists.llvm.org
    Classification: Unclassified

Created attachment 15123
  --> https://llvm.org/bugs/attachment.cgi?id=15123&action=edit
clang input

The provided test case shows that the LiveIn lists for some MBB have been
filled with long lists of non-live registers. This seems to happen after
Control Flow Optimizer, and after If Converter. Target is SystemZ.

Test case provided. It is reduced, but still have two small functions due to
inlining results required to reproduce the interesting function.

Run with:
./bin/clang -cc1 -triple s390x-ibm-linux-gnu -S -disable-free
-mrelocation-model static -mthread-model posix -fmath-errno -target-cpu z13
-momit-leaf-frame-pointer -v -O3 -funroll-loops -vectorize-loops -vectorize-slp
-o c-typeck.reduced.s -x ir c-typeck.reduced.bc -mllvm -print-machineinstrs >&
out

The file 'out' will have the printed instructions. 
The 'build_function_call' function displays the problem.

In the fragments of the dump below, it is clear that some return-blocks or
their fall-through predecessor have very long lists of live-in regs that do not
belong there. This is bad because it will make later optimizations more limited
- for instance those using LivePhysRegs for liveness tracking.

# After Control Flow Optimizer:

BB#114: derived from LLVM BB %cleanup
    Live Ins: %V8 %V9 %V10 %V11 %V12 %V13 %V14 %V15 %F8D %F9D %F10D %F11D %F12D
%F13D %F14D %F15D %F8Q %F9Q %F12Q %F13Q %F8S %F9S %F10S %F11S %F12S %F13S %F14S
%F15S %R2D %R3D %R2
H %R3H %R2L %R3L %R2Q %V8 %V9 %V10 %V11 %V12 %V13 %V14 %V15 %F8D %F9D %F10D
%F11D %F12D %F13D %F14D %F15D %F8Q %F9Q %F12Q %F13Q %F8S %F9S %F10S %F11S %F12S
%F13S %F14S %F15S %R2D 
%R2H %R2L %R2Q %V8 %V9 %V10 %V11 %V12 %V13 %V14 %V15 %F8D %F9D %F10D %F11D
%F12D %F13D %F14D %F15D %F8Q %F9Q %F12Q %F13Q %F8S %F9S %F10S %F11S %F12S %F13S
%F14S %F15S
    Predecessors according to CFG: BB#113 BB#12 BB#10
        %R2D<def> = LGRL <ga:@global_trees>; mem:LD8[getelementptr inbounds
([51 x %union.tree_node*], [51 x %union.tree_node*]* @global_trees, i64 0, i64
0)](tbaa=!3)
    Successors according to CFG: BB#115

BB#115: derived from LLVM BB %cleanup
    Live Ins: %R2D
    Predecessors according to CFG: BB#106 BB#110 BB#108 BB#112 BB#114 BB#109
        %R6D<def>, %R15D<def> = LMG %R15D, 248, %R7D<imp-def>, %R8D<imp-def>,
%R9D<imp-def>, %R10D<imp-def>, %R11D<imp-def>, %R12D<imp-def>, %R13D<imp-def>,
%R14D<imp-def>
        Return %R2D<imp-use>


# After If Converter:

BB#114: 
    Live Ins: %R1D %V8 %V9 %V10 %V11 %V12 %V13 %V14 %V15 %F8D %F9D %F10D %F11D
%F12D %F13D %F14D %F15D %F8Q %F9Q %F12Q %F13Q %F8S %F9S %F10S %F11S %F12S %F13S
%F14S %F15S %R1D %R1H %R1L %R0Q
    Predecessors according to CFG: BB#107 BB#110
        %R2D<def> = LGR %R1D<kill>
        %R6D<def>, %R15D<def> = LMG %R15D, 248, %R7D<imp-def>, %R8D<imp-def>,
%R9D<imp-def>, %R10D<imp-def>, %R11D<imp-def>, %R12D<imp-def>, %R13D<imp-def>,
%R14D<imp-def>
        Return %R2D<imp-use>

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