[LLVMbugs] [Bug 22995] New: Registers swapped with -no-integrated-as

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Mon Mar 23 07:04:19 PDT 2015


https://llvm.org/bugs/show_bug.cgi?id=22995

            Bug ID: 22995
           Summary: Registers swapped with -no-integrated-as
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: normal
          Priority: P
         Component: MC
          Assignee: unassignedbugs at nondot.org
          Reporter: russell_gallop at sn.scee.net
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

Built from r232944.

Building this example using -no-integrated-as results in a small difference in
the generated code. The register operands of the instruction at 0xc are swapped
compared to direct object emission.

$ cat test.cpp
int a, b;
int fn1();
void fn2() {
  if (a & fn1())
    b = 0;
}
$ clang -c -O2 test.cpp -o direct.o && objdump -d direct.o

direct.o:     file format elf64-x86-64

Disassembly of section .text:

0000000000000000 <_Z3fn2v>:
   0:   53                      push   %rbx
   1:   8b 1d 00 00 00 00       mov    0x0(%rip),%ebx        # 7 <_Z3fn2v+0x7>
   7:   e8 00 00 00 00          callq  c <_Z3fn2v+0xc>
   c:   85 c3                   test   %eax,%ebx
   e:   74 0a                   je     1a <_Z3fn2v+0x1a>
  10:   c7 05 00 00 00 00 00    movl   $0x0,0x0(%rip)        # 1a
<_Z3fn2v+0x1a>
  17:   00 00 00
  1a:   5b                      pop    %rbx
  1b:   c3                      retq
$ clang -c -O2 test.cpp -no-integrated-as -o no_int_as.o && objdump -d
no_int_as.o

no_int_as.o:     file format elf64-x86-64

Disassembly of section .text:

0000000000000000 <_Z3fn2v>:
   0:   53                      push   %rbx
   1:   8b 1d 00 00 00 00       mov    0x0(%rip),%ebx        # 7 <_Z3fn2v+0x7>
   7:   e8 00 00 00 00          callq  c <_Z3fn2v+0xc>
   c:   85 d8                   test   %ebx,%eax
   e:   74 0a                   je     1a <_Z3fn2v+0x1a>
  10:   c7 05 00 00 00 00 00    movl   $0x0,0x0(%rip)        # 1a
<_Z3fn2v+0x1a>
  17:   00 00 00
  1a:   5b                      pop    %rbx
  1b:   c3                      retq

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