[LLVMbugs] [Bug 22984] New: [X86] recognize vperm2 with zero masks

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https://llvm.org/bugs/show_bug.cgi?id=22984

            Bug ID: 22984
           Summary: [X86] recognize vperm2 with zero masks
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: spatel+llvm at rotateright.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

We're not matching shuffles that correspond to vperm2*128 instructions with a
zero operand. Note that in some cases, this is already lowered to xor + blend,
and that would be preferred to a vperm2 because xor is free and blends are
always better than or equal to permutes; but if -Oz, then choose vperm2 for the
size savings.

Also, we should be canonicalizing shuffles with one constant vector input to
make life easier for backends to match patterns like this.

Here's the complete list of vperm2 with zero possibilities:

define <4 x double> @vperm2z_0x08(<4 x double> %a) {
  %s = shufflevector <4 x double> %a, <4 x double> <double 0.0, double 0.0,
double undef, double undef>, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
  ret <4 x double> %s
}

define <4 x double> @vperm2z_0x18(<4 x double> %a) {
  %s = shufflevector <4 x double> %a, <4 x double> <double 0.0, double 0.0,
double undef, double undef>, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
  ret <4 x double> %s
}

define <4 x double> @vperm2z_0x28(<4 x double> %a) {
  %s = shufflevector <4 x double> <double 0.0, double 0.0, double undef, double
undef>, <4 x double> %a, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
  ret <4 x double> %s
}

define <4 x double> @vperm2z_0x38(<4 x double> %a) {
  %s = shufflevector <4 x double> <double 0.0, double 0.0, double undef, double
undef>, <4 x double> %a, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
  ret <4 x double> %s
}

define <4 x double> @vperm2z_0x80(<4 x double> %a) {
  %s = shufflevector <4 x double> %a, <4 x double> <double 0.0, double 0.0,
double undef, double undef>, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
  ret <4 x double> %s
}

define <4 x double> @vperm2z_0x81(<4 x double> %a) {
  %s = shufflevector <4 x double> %a, <4 x double> <double 0.0, double 0.0,
double undef, double undef>, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
  ret <4 x double> %s
}

define <4 x double> @vperm2z_0x82(<4 x double> %a) {
  %s = shufflevector <4 x double> <double 0.0, double 0.0, double undef, double
undef>, <4 x double> %a, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
  ret <4 x double> %s
}

define <4 x double> @vperm2z_0x83(<4 x double> %a) {
  %s = shufflevector <4 x double> <double 0.0, double 0.0, double undef, double
undef>, <4 x double> %a, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
  ret <4 x double> %s
}

$ llc vpz.ll -mattr=avx -o - 

_vperm2z_0x08:
    vxorps    %ymm1, %ymm1, %ymm1
    vinsertf128    $1, %xmm0, %ymm1, %ymm0
    retq
_vperm2z_0x18:
    vxorpd    %ymm1, %ymm1, %ymm1
    vblendpd    $12, %ymm0, %ymm1, %ymm0 ## ymm0 = ymm1[0,1],ymm0[2,3]
    retq
_vperm2z_0x28:
    vxorps    %ymm1, %ymm1, %ymm1
    vinsertf128    $1, %xmm0, %ymm1, %ymm0
    retq
_vperm2z_0x38: 
    vxorpd    %ymm1, %ymm1, %ymm1
    vblendpd    $12, %ymm0, %ymm1, %ymm0 ## ymm0 = ymm1[0,1],ymm0[2,3]
    retq
_vperm2z_0x80:  
    vxorps    %ymm1, %ymm1, %ymm1
    vinsertf128    $1, %xmm1, %ymm0, %ymm0
    retq
_vperm2z_0x81:
    vxorps    %ymm1, %ymm1, %ymm1
    vperm2f128    $33, %ymm1, %ymm0, %ymm0 ## ymm0 = ymm0[2,3],ymm1[0,1]
    retq
_vperm2z_0x82:  
    vxorps    %ymm1, %ymm1, %ymm1
    vinsertf128    $1, %xmm1, %ymm0, %ymm0
    retq
_vperm2z_0x83: 
    vxorps    %ymm1, %ymm1, %ymm1
    vperm2f128    $33, %ymm1, %ymm0, %ymm0 ## ymm0 = ymm0[2,3],ymm1[0,1]
    retq

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