[LLVMbugs] [Bug 23876] New: Incorrect CFG edge weights calculated for loop preheader.

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Wed Jun 17 11:39:31 PDT 2015


https://llvm.org/bugs/show_bug.cgi?id=23876

            Bug ID: 23876
           Summary: Incorrect CFG edge weights calculated for loop
                    preheader.
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: Loop Optimizer
          Assignee: unassignedbugs at nondot.org
          Reporter: congh at google.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

For the attached test case, LLVM generates a new loop preheader with new edges,
but the weights on those edges are assigned incorrectly. As a result, the sum
of frequencies on incoming edges to the preheader is not equal to the sum of
frequencies on outgoing edges (see the attached CFG, in which BB#2 is the newly
generated preheader).

To reproduce this issue, compile the test case in the following commands:

clang++ -O2 -fprofile-instr-generate test.C
./a.out
llvm-profdata merge -output=profdata default.profraw
clang++ -O2 -fprofile-instr-use=profdata test.C -mllvm -print-after-all &>
test.dump

In the dumped file, you can see the following IR. Note that the edge weight on
BB#2 to BB#3 is 7 comparing to 46 on BB#2 to BB at 1, which is incorrect as the
edge BB#2 to BB#3 is never taken. 


# Machine code for function _Z3fooP4listi: Post SSA
Function Live Ins: %RDI in %vreg2, %ESI in %vreg3

BB#0: derived from LLVM BB %entry
    Live Ins: %ESI %RDI
        TEST32rr %ESI<kill>, %ESI, %EFLAGS<imp-def>
        JNE_1 <BB#3>, %EFLAGS<imp-use>
    Successors according to CFG: BB#3(1008003) BB#2(11020005)

BB#2: derived from LLVM BB %while.body, Align 4 (16 bytes)
    Live Ins: %BH %BL %BP %BPL %BX %DI %DIL %EBP %EBX %EDI %RBP %RBX %RDI %R12
%R13 %R14 %R15 %R12B %R13B %R14B %R15B %R12D %R13D %R14D %R15D %R12W %R13W
%R14W %R15W %BH %BL %BP %BPL %BX %DI %DIL %EBP %EBX %EDI %RBP %RBX %RDI %R12
%R13 %R14 %R15 %R12B %R13B %R14B %R15B %R12D %R13D %R14D %R15D %R12W %R13W
%R14W %R15W
    Predecessors according to CFG: BB#0
        TEST64rr %RDI, %RDI, %EFLAGS<imp-def>
        JE_1 <BB#3>, %EFLAGS<imp-use>
    Successors according to CFG: BB#3(7) BB#1(46)

BB#1: derived from LLVM BB %while.body
    Live Ins: %RDI
    Predecessors according to CFG: BB#2 BB#4
        %RDI<def> = MOV64rm %RDI<kill>, 1, %noreg, 0, %noreg;
mem:LD8[%next5](tbaa=<0x1f56438>)
    Successors according to CFG: BB#4

BB#4: 
    Predecessors according to CFG: BB#1
        TEST64rr %RDI, %RDI, %EFLAGS<imp-def>
        JNE_1 <BB#1>, %EFLAGS<imp-use,kill>
    Successors according to CFG: BB#3 BB#1

BB#3: derived from LLVM BB %if.end
    Predecessors according to CFG: BB#0 BB#2 BB#4
        RETQ

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