[LLVMbugs] [Bug 24089] New: Invalid lgdt/lidt instruction generation on 32Bit x86 using intel syntax

[bugzilla-daemon at llvm.org]

https://llvm.org/bugs/show_bug.cgi?id=24089

            Bug ID: 24089
           Summary: Invalid lgdt/lidt instruction generation on 32Bit x86
                    using intel syntax
           Product: clang
           Version: 3.6
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: LLVM Codegen
          Assignee: unassignedclangbugs at nondot.org
          Reporter: Mrrrgbl at gmail.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

When you try to load GDTR/IDTR registers using intel syntax, like that:

static struct __attribute__((packed)) GDTValue{
    uint16_t limit;
    addr_t addr;
}GDTValue;

__asm lgdt [GDTValue];

It produces this llvm asm:
%0 = tail call i32 asm sideeffect inteldialect "lgdt dword ptr $1",
"={eax},*m,~{dirflag},~{fpsr},~{flags}"(%struct.GDTValue*
@MemoryManagerInit.GDTValue) #4, !srcloc !42

and 

66 0f 01 15 x86 opcode. 

However, if you using 32 bit environment (I compiled with -m32 option to be
sure), prefix 66 makes this instruction to be 16 bit version. This loads only 5
bytes in register instead of 6, making its value totaly incorrect. Using 'dword
ptr' or 'word ptr' specifiers doesn't make any change (I assumed there was bug
with swapped prefix for 16/32 bit). Using asm(...) with ATT syntax instead of
__asm produces right code, which I use as workaround.

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