[LLVMbugs] [Bug 22110] New: while+switch at -O2 mixes up line info
bugzilla-daemon at llvm.org
bugzilla-daemon at llvm.org
Tue Jan 6 14:12:33 PST 2015
http://llvm.org/bugs/show_bug.cgi?id=22110
Bug ID: 22110
Summary: while+switch at -O2 mixes up line info
Product: libraries
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: Common Code Generator Code
Assignee: unassignedbugs at nondot.org
Reporter: paul_robinson at playstation.sony.com
CC: llvmbugs at cs.uiuc.edu
Classification: Unclassified
Created attachment 13641
--> http://llvm.org/bugs/attachment.cgi?id=13641&action=edit
Sample source
Compiling the attached source with -O2 -g (or -gline-tables-only) and
the line info for the head of the while loop gets pretty confused.
Two instructions basically have their line info swapped, and another
instruction at the top of a block has no info at all.
The relevant source fragment is this (pData is a char*, Op is an enum):
/*25*/ while (1) {
/*26*/ Op op = static_cast<Op>(*pData++);
/*27*/ switch (op) {
which for me generated the following... note that
.LBB0_8 is one case of the switch, which was laid out above the
top of the loop--that's fine--but the line info clearly isn't right.
I added some annotations to help point out the problem.
## This is the case from the switch, which is fine.
.LBB0_8: # %if.then
# in Loop: Header=BB0_1 Depth=1
.loc 1 47 11 prologue_end # bz92041.cpp:47:11
.Ltmp1:
movswq 1(%rsi), %rcx
leaq 3(%rcx,%rsi), %rdi
.LBB0_1: # %while.body
# =>This Inner Loop Header: Depth=1
## NO LINE INFO HERE--1st instr of loop body inherits from prior basic block
movq %rdi, %rsi
## WRONG LINE INFO HERE--Load of *pData has line info for switch()
.loc 1 27 5 # bz92041.cpp:27:5
movzbl (%rsi), %ecx
## WRONG LINE INFO HERE--Range-check has line info for the load
.loc 1 26 29 # bz92041.cpp:26:29
cmpq $3, %rcx
.loc 1 27 5 # bz92041.cpp:27:5
ja .LBB0_9
# BB#2: # %while.body
# in Loop: Header=BB0_1 Depth=1
## Post-increment (*pData++) has correct line info
.loc 1 26 30 # bz92041.cpp:26:30
leaq 1(%rsi), %rdi
## WRONG LINE INFO HERE--switch dispatch inherits from previous instr
jmpq *.LJTI0_0(,%rcx,8)
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