[LLVMbugs] [Bug 23321] New: Optimize bitfield accesses to generate power of 2 load/store

[bugzilla-daemon at llvm.org]

https://llvm.org/bugs/show_bug.cgi?id=23321

            Bug ID: 23321
           Summary: Optimize bitfield accesses to generate power of 2
                    load/store
           Product: tools
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: opt
          Assignee: unassignedbugs at nondot.org
          Reporter: pete.cooper at gmail.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

r235528 changed MachineOperand::OpKind from an unsigned char to a bitfield. 
This was to optimize the accesses of the bitfields after it.

We had a struct something like 

struct MachineOperand {
  unsigned char OpKind;
  unsigned int bitfield1 : 1;
  unsigned int bitfield2 : 1;
...
}

Although the 24-bits of bitfields and the unsigned char shared 32-bits of
storage space, the actual accesses to the bitfields were generated as i24
load/store which isn't legal.  This ultimately leads to the backend having to
split the i24 in to i8 and i16 operations.

We should be able to optimize this so that the load/store are done as i32
operations.  Attaching before/after IR which is an unsigned char/bitfield. 
Note that there may be issues with volatility which prevent doing an
optimization here.  That will have to be investigated.  If OpKind was volatile
then folding it in to the bitfields with load/store has the possibility to
change behavior.

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