[LLVMbugs] [Bug 21274] New: InstCombine: ((1 << A) >>u B) --> (1 << (A-B)) incorrect if A-B > bitwidth

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=21274

            Bug ID: 21274
           Summary: InstCombine: ((1 << A) >>u B) --> (1 << (A-B))
                    incorrect if A-B > bitwidth
           Product: libraries
           Version: trunk
          Hardware: All
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Scalar Optimizations
          Assignee: unassignedbugs at nondot.org
          Reporter: nunoplopes at sapo.pt
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

simplifyValueKnownNonZero() in InstCombineMulDivRem.cpp simplifies the RHS of
div/rem instructions.

However, the first transformation it does on RHS doesn't seem correct:
((1 << A) >>u B) --> (1 << (A-B))


Pre: isPowerOf2(%Power)
%shl = shl %Power, %A
%Y = lshr %shl, %B
%r = udiv %X, %Y
  =>
%sub = sub %A, %B
%Y = shl %Power, %sub
%r = udiv %X, %Y


Alive says the following:
ERROR: Domain of definedness of Target is smaller than Source's for i4 %Y

Example:
%Power i4 = 0x4 (4)
%A i4 = 0x0 (0)
%B i4 = 0x1 (1)
%X i4 = 0x0 (0)
%shl i4 = 0x4 (4)
%sub i4 = 0xF (15, -1)
Source value: 0x2 (2)
Target value: undef


Can't see a fix other than removing this transformation altogether.

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