[LLVMbugs] [Bug 21478] New: MIPS assertions failed when disassembling SC and CACHE instructions

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=21478

            Bug ID: 21478
           Summary: MIPS assertions failed when disassembling SC and CACHE
                    instructions
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: MIPS
          Assignee: unassignedbugs at nondot.org
          Reporter: csdavec at swan.ac.uk
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

A few instructions in the MIPS back end (SC and CACHE) have MemOpnd operands
that confuse the disassembler.  They are a single operand, but the disassembler
treats them as two, resulting assertion failures because the operands are out
of range.

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