[LLVMbugs] [Bug 21465] New: [NVPTX] byval parameters are incorrectly lowered

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=21465

            Bug ID: 21465
           Summary: [NVPTX] byval parameters are incorrectly lowered
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: PTX
          Assignee: unassignedbugs at nondot.org
          Reporter: wujingyue at gmail.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

The current backend treats the base address of a byval parameter as a generic
pointer. However, generic loads don't actually work with a pointer to the
parameter space. Here's a small test case to reproduce this issue:

CUDA:

struct S {
  int a, b;
};

__attribute__((global)) void TakesStruct(S input, int *output) {
  *output = input.b;
}

LLVM IR:

target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
target triple = "nvptx64-unknown-unknown"

%struct.S = type { i32, i32 }

; Function Attrs: nounwind
define void @_Z11TakesStruct1SPi(%struct.S* byval nocapture readonly %input,
i32* nocapture %output) #0 {
entry:
  %b = getelementptr inbounds %struct.S* %input, i64 0, i32 1
  %0 = load i32* %b, align 4, !tbaa !2
  store i32 %0, i32* %output, align 4, !tbaa !7
  ret void
}

attributes #0 = { nounwind "less-precise-fpmad"="false"
"no-frame-pointer-elim"="false" "no-infs-fp-math"="false"
"no-nans-fp-math"="false" "stack-protector-buffer-size"="8"
"unsafe-fp-math"="false" "use-soft-float"="false" }

!nvvm.annotations = !{!0}
!llvm.ident = !{!1}

!0 = metadata !{void (%struct.S*, i32*)* @_Z11TakesStruct1SPi, metadata
!"kernel", i32 1}
!1 = metadata !{metadata !"clang version 3.6.0 (http://llvm.org/git/clang.git
1f064ca0a944bf0279b0d6508268a4ea0a354b8e) (http://llvm.org/git/llvm.git
8744520b533617fbbd55ef12ea936961f5225cf5)"}
!2 = metadata !{metadata !3, metadata !4, i64 4}
!3 = metadata !{metadata !"_ZTS1S", metadata !4, i64 0, metadata !4, i64 4}
!4 = metadata !{metadata !"int", metadata !5, i64 0}
!5 = metadata !{metadata !"omnipotent char", metadata !6, i64 0}
!6 = metadata !{metadata !"Simple C/C++ TBAA"}
!7 = metadata !{metadata !4, metadata !4, i64 0}

PTX (sm_35):

//
// Generated by LLVM NVPTX Back-End
//

.version 3.2
.target sm_35
.address_size 64

    // .globl    _Z11TakesStruct1SPi
                                        // @_Z11TakesStruct1SPi
.visible .entry _Z11TakesStruct1SPi(
    .param .align 4 .b8 _Z11TakesStruct1SPi_param_0[8],
    .param .u64 _Z11TakesStruct1SPi_param_1
)
{
    .reg .s32     %r<2>;
    .reg .s64     %rd<3>;

// BB#0:                                // %entry
    mov.b64    %rd1, _Z11TakesStruct1SPi_param_0;
    ld.param.u64     %rd2, [_Z11TakesStruct1SPi_param_1];
    ld.u32     %r1, [%rd1+4];
    st.u32     [%rd2], %r1;
    ret;
}

The problematic instructions are:
    mov.b64    %rd1, _Z11TakesStruct1SPi_param_0;
    ld.u32     %r1, [%rd1+4];
The compiled kernel crashes because the ld.u32 loads from a pointer to the
parameter space.

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