[LLVMbugs] [Bug 19400] Port big-endian support to ARM64

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=19400

James Molloy <james.molloy at arm.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|RESOLVED                    |REOPENED
         Resolution|FIXED                       |---

--- Comment #2 from James Molloy <james.molloy at arm.com> ---
A rather nasty issue regarding GCC incompatibility has been discovered, that
makes it necessary to reopen this issue.

During a discussion with the GCC folks, two faults in Clang were identified:

   # The lane index to the lane-based vector intrinsics (such as vget_lane) is
being treated as the logical lane, not the architectural lane. Richard Earnshaw
has confirmed that it should be the architectural lane "as if" loaded by LDR.
   # The LD1 intrinsic is a user override and the compiler should not undo the
LD1. The LD1 intrinsic is lowered to a normal LOAD node, so the compiler treats
it like any load and ensures it acts as if the load had been performed by LDR.
But LD1 should override this behaviour, and the load should be performed as if
it were loaded with LD1, not LDR.

Also of note is that the GCC vector extension initializer list syntax:

  uint32x2_t x = {0, 1};

Is not allowed to be mixed with NEON intrinsics. Clang should warn about this.

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