[LLVMbugs] [Bug 18680] New: bitfield load/stores not merged
bugzilla-daemon at llvm.org
bugzilla-daemon at llvm.org
Thu Jan 30 15:46:36 PST 2014
http://llvm.org/bugs/show_bug.cgi?id=18680
Bug ID: 18680
Summary: bitfield load/stores not merged
Product: libraries
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: enhancement
Priority: P
Component: Scalar Optimizations
Assignee: unassignedbugs at nondot.org
Reporter: hfinkel at anl.gov
CC: llvmbugs at cs.uiuc.edu
Classification: Unclassified
Created attachment 11984
--> http://llvm.org/bugs/attachment.cgi?id=11984&action=edit
original IR
I noticed, in the context of debugging another problem, that Clang/LLVM
generates what seems like poor code for the bitfield copies in
llvm::APFloat::assign(llvm::APFloat const&):
APFloat::assign(const APFloat &rhs)
{
...
sign = rhs.sign;
category = rhs.category;
...
which generates (at least for ppc64):
%sign = getelementptr inbounds %"class.llvm::APFloat"* %rhs, i64 0, i32 3
%bf.load = load i8* %sign, align 2
%sign3 = getelementptr inbounds %"class.llvm::APFloat"* %this, i64 0, i32 3
%bf.load4 = load i8* %sign3, align 2
%bf.shl = and i8 %bf.load, 16
%bf.clear5 = and i8 %bf.load4, -17
%bf.set = or i8 %bf.clear5, %bf.shl
store i8 %bf.set, i8* %sign3, align 2
%bf.load6 = load i8* %sign, align 2
%bf.lshr7 = and i8 %bf.load6, -32
%bf.clear13 = and i8 %bf.set, 31
%bf.set14 = or i8 %bf.clear13, %bf.lshr7
store i8 %bf.set14, i8* %sign3, align 2
which has an extra load/store pair. We should produce something more like:
%sign = getelementptr inbounds %"class.llvm::APFloat"* %rhs, i64 0, i32 3
%bf.load = load i8* %sign, align 2
%sign3 = getelementptr inbounds %"class.llvm::APFloat"* %this, i64 0, i32 3
%bf.load4 = load i8* %sign3, align 2
%bf.lshr7 = and i8 %bf.load4, -32
%bf.clear13 = and i8 %bf.load, 31
%bf.set14 = or i8 %bf.clear13, %bf.lshr7
store i8 %bf.set14, i8* %sign3, align 2
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