[LLVMbugs] [Bug 1765] PPC: condition register bits and registers confused

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=1765

Hal Finkel <hfinkel at anl.gov> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
                 CC|                            |hfinkel at anl.gov
         Resolution|---                         |FIXED

--- Comment #21 from Hal Finkel <hfinkel at anl.gov> ---
The PPC backend now properly tracks CR bits, and the current creqv definition
reads:

def CREQV  : XLForm_1<19, 289, (outs crbitrc:$CRD),
                               (ins crbitrc:$CRA, crbitrc:$CRB),
                      "creqv $CRD, $CRA, $CRB", IIC_BrCR,
                      [(set i1:$CRD, (not (xor i1:$CRA, i1:$CRB)))]>;

I assume this bug has now been fixed.

-- 
You are receiving this mail because:
You are on the CC list for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-bugs/attachments/20141209/89f28a58/attachment.html>