[LLVMbugs] [Bug 17460] New: [SPARC64] SparcInstrInfo.td didn't emit fcc register for floating point compare instruction.

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=17460

            Bug ID: 17460
           Summary: [SPARC64] SparcInstrInfo.td didn't emit fcc register
                    for floating point compare instruction.
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: Sparc
          Assignee: unassignedbugs at nondot.org
          Reporter: syoyofujita at gmail.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

According to SparcV9 64bit(A.13 Floating-Point Compare in
http://www.sparc.com/standards/SPARCV9.pdf), floating compare instruction must
have fcc register, but current SparcInstrInfo.td doesn't care of it.

# expected(only in SparcV9 + 64bit target)
fcmpd %fcc0, %f0, %f2

# current
fcmpd %f0, %f2

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