[LLVMbugs] [Bug 17902] New: [x86_64] CodeGen generates an instruction that is impossible to encode in x86_64.
bugzilla-daemon at llvm.org
bugzilla-daemon at llvm.org
Tue Nov 12 17:17:50 PST 2013
http://llvm.org/bugs/show_bug.cgi?id=17902
Bug ID: 17902
Summary: [x86_64] CodeGen generates an instruction that is
impossible to encode in x86_64.
Product: new-bugs
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: new bugs
Assignee: unassignedbugs at nondot.org
Reporter: madhusudancs at gmail.com
CC: llvmbugs at cs.uiuc.edu
Classification: Unclassified
Created attachment 11527
--> http://llvm.org/bugs/attachment.cgi?id=11527&action=edit
C snippet to reproduce the bug
I ran into a subtle bug related to x86_64 instruction encoding when using LLVM
JIT. (I am using LLVM 3.3 release version. There is no 3.3 in the Version field
above, so I have chosen trunk as the version).
I am attaching the super-reduced test case (the C file) that reproduces the
bug. Just to be on the same page, I ran the following commands to obtain the
.ll, .o and .s files:
$ clang -cc1 -O1 -emit-llvm x86encodingbug.c
$ llc -O0 --regalloc=fast -filetype=obj x86encodingbug.ll
$ llc -O0 --regalloc=fast -filetype=asm x86encodingbug.ll
If we compare line x86encodingbug.s:62 with the equivalent instruction in the
x86encodingbug.o file (through objdump -S) the bug is kind of evident.
Intended instruction: movb %ah, (%rdi,%r8)
Actual instruction: mov %spl,(%rdi,%r8,1)
Note the %ah vs %spl register.
Running this code through lli using the following command line arguments:
$ lli -O0 --regalloc=fast x86encodingbug.ll 0 a
String: �
where the expected result was "String: 7" (ASCII code of 'a' is 97).
Notes in page 977 (or Vol. 2A 3-503) of Intel's manual:
http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-manual-325462.pdf
states that this instruction cannot be encoded:
"""
***In 64-bit mode, r/m8 can not be encoded to access the following byte
registers if a REX prefix is used: AH, BH, CH, DH.
"""
x86's RegisterInfo Target Descriptor
(llvm/lib/Target/X86/X86RegisterInfo.td:60) also mentions this and yet an
instruction which cannot be encoded is generated.
This was probably a regression introduced by the commits that fixed bug #6151.
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