[LLVMbugs] [Bug 17868] New: llc aborts on testcase

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Sat Nov 9 20:38:28 PST 2013


http://llvm.org/bugs/show_bug.cgi?id=17868

            Bug ID: 17868
           Summary: llc aborts on testcase
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Loop Optimizer
          Assignee: unassignedbugs at nondot.org
          Reporter: vargaz at gmail.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

Created attachment 11505
  --> http://llvm.org/bugs/attachment.cgi?id=11505&action=edit
testcase

llc aborts with the following on the attached testcase:

<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
Instruction does not dominate all uses!
  %1 = add i64 %0, 1
  %lsr = trunc i64 %1 to i32
Broken module found, compilation aborted!
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>

LLVM version: svn r194345
<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
LLVM (http://llvm.org/):
  LLVM version 3.4svn
  DEBUG build with assertions.
  Built Nov  8 2013 (23:07:17).
  Default target: x86_64-apple-darwin13.0.0
  Host CPU: corei7-avx

  Registered Targets:
    aarch64 - AArch64 (ARM 64-bit target)
    arm     - ARM
    thumb   - Thumb
    x86     - 32-bit X86: Pentium-Pro and above
    x86-64  - 64-bit X86: EM64T and AMD64
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
llc command line: llc bug.bc

It looks like the problem is introduced by the loop-reduce pass,
i.e.: llc -stop-after=loop-reduce -print-after-all shows:
<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
*** IR Dump After Print module to stderr ***; ModuleID = 'y.bc'
target triple = "x86_64-apple-darwin13.0.0"

define void @FOO() {
BB0:
  br label %BB1

BB1:                                              ; preds = %BB9, %BB0
  %0 = sext i32 undef to i64
  br i1 undef, label %BB5.preheader, label %BB9

BB5.preheader:                                    ; preds = %BB1
  br label %BB5

BB5:                                              ; preds = %BB5.preheader,
%BB6
  %indvars.iv = phi i64 [ %indvars.iv.next.pre-phi, %BB6 ], [ %0,
%BB5.preheader ]
  %lsr1 = trunc i64 %indvars.iv to i32
  %lsr = trunc i64 %indvars.iv.next.pre-phi to i32
  %1 = add i64 %indvars.iv, 1
  %.pre = trunc i64 %1 to i32
  br i1 undef, label %BB7, label %BB6
.....
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
At this line:
%lsr = trunc i64 %indvars.iv.next.pre-phi to i32

indvars.iv.next.pre-phi is not set when control goes
BB0->BB1->BB5.preheader->BB5.

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