[LLVMbugs] [Bug 17792] New: llvm X86 backend generates long nop instructions for processors that don't support them
bugzilla-daemon at llvm.org
bugzilla-daemon at llvm.org
Sun Nov 3 13:37:16 PST 2013
http://llvm.org/bugs/show_bug.cgi?id=17792
Bug ID: 17792
Summary: llvm X86 backend generates long nop instructions for
processors that don't support them
Product: new-bugs
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: new bugs
Assignee: unassignedbugs at nondot.org
Reporter: mikulas at artax.karlin.mff.cuni.cz
CC: llvmbugs at cs.uiuc.edu
Classification: Unclassified
When generating code for some 586 processors (including k6, winchip, via c3),
NOPL or NOPW instruction 0F 1F is generated. This causes crash because 586
processors don't support the NOPL and NOPW instruction.
For example, this program:
#include <stdio.h>
int main(void)
{
int i;
for (i = 0; i < 1000; i++)
printf("%d\n", i);
return 0;
}
when compiled with "clang -O2 loop.c -march=k6-2" results in this code:
08048420 <main>:
8048420: 56 push %esi
8048421: 83 ec 08 sub $0x8,%esp
8048424: 31 f6 xor %esi,%esi
8048426: 66 2e 0f 1f 84 00 00 nopw %cs:0x0(%eax,%eax,1)
804842d: 00 00 00
8048430: 89 74 24 04 mov %esi,0x4(%esp)
8048434: c7 04 24 e0 84 04 08 movl $0x80484e0,(%esp)
804843b: e8 c0 fe ff ff call 8048300 <printf at plt>
8048440: 46 inc %esi
8048441: 81 fe e8 03 00 00 cmp $0x3e8,%esi
8048447: 75 e7 jne 8048430 <main+0x10>
8048449: 31 c0 xor %eax,%eax
804844b: 83 c4 08 add $0x8,%esp
804844e: 5e pop %esi
804844f: c3 ret
The K6 processor doesn't support the nopw instruction, so the program crashes.
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