[LLVMbugs] [Bug 16360] New: x86 backend: bug in shift of vector elements
bugzilla-daemon at llvm.org
bugzilla-daemon at llvm.org
Tue Jun 18 09:00:36 PDT 2013
http://llvm.org/bugs/show_bug.cgi?id=16360
Bug ID: 16360
Summary: x86 backend: bug in shift of vector elements
Product: new-bugs
Version: unspecified
Hardware: PC
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: new bugs
Assignee: unassignedbugs at nondot.org
Reporter: ili.filippov at gmail.com
CC: llvmbugs at cs.uiuc.edu
Classification: Unclassified
Created attachment 10698
--> http://llvm.org/bugs/attachment.cgi?id=10698&action=edit
Reproducer of the fail
Clang on x86 has an error on attached test if we compile it with -O0 and -m32
(for -msse4 or -mavx targets).
Result is:
sum = 0
TTT1 = 3ffffffffc000000, 3ffffffffc000000, 3ffffffffc000000, 3ffffffffc000000
TTT2 = fffffffffc000000, fffffffffc000000, fffffffffc000000, fffffffffc000000
But TTT1 TTT2 should be the same.
I suppose that problem is in code generation, because llvm representation of
TTT1 TTT2 differ reasonable (only one number, which is different in the source
and should not affect the result).
But their asm representations differ a lot:
If we compile with:
clang -m32 -O0 foo.c -S -mavx
we will have for TTT1:
movl 136(%esp), %ecx
movl %ecx, %edx
sarl $31, %edx
shrl %edx
orl $1073741823, %edx # imm = 0x3FFFFFFF
shrl %ecx
orl $-67108864, %ecx # imm = 0xFFFFFFFFFC000000
vmovd %ecx, %xmm0
vpinsrd $1, %edx, %xmm0, %xmm0
and for TTT2:
movl 136(%esp), %ecx
shrl $2, %ecx
orl $-67108864, %ecx # imm = 0xFFFFFFFFFC000000
movl $-1, %edx
vmovd %ecx, %xmm0
vpinsrd $1, %edx, %xmm0, %xmm0
EDX appears to be different, while it should be the same.
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