[LLVMbugs] [Bug 14848] New: Suboptimal lowering of sdiv <4 x i32> %vx, <i32 16, i32 16, i32 16, i32 16>

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Tue Jan 8 05:12:01 PST 2013


http://llvm.org/bugs/show_bug.cgi?id=14848

             Bug #: 14848
           Summary: Suboptimal lowering of sdiv <4 x i32> %vx, <i32 16,
                    i32 16, i32 16, i32 16>
           Product: libraries
           Version: trunk
          Platform: PC
        OS/Version: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: zvi.rackover at intel.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


The following IR instruction
sdiv <8 x i32> %x, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32
16>

can be lowered to an efficient vector sequence. Currently, the following
sequence is generated:
        vextractf128    $1, %ymm0, %xmm1
        vmovd   %xmm1, %eax
        movl    %eax, %esi
        sarl    $31, %esi
        shrl    $26, %esi
        addl    %eax, %esi
        vpextrd $2, %xmm0, %ecx
        movl    %ecx, %eax
        sarl    $31, %eax
        shrl    $26, %eax
        vpextrd $1, %xmm0, %edi
        movl    %edi, %edx
        sarl    $31, %edx
        shrl    $26, %edx
        addl    %edi, %edx
        sarl    $6, %esi
        addl    %ecx, %eax
        vpextrd $1, %xmm1, %ecx
        movl    %ecx, %edi
        sarl    $31, %edi
        shrl    $26, %edi
        addl    %ecx, %edi
        sarl    $6, %edi
        sarl    $6, %eax
        vpextrd $3, %xmm0, %r8d
        vmovd   %esi, %xmm2
        sarl    $6, %edx
        vmovd   %xmm0, %ecx
        movl    %ecx, %esi
        sarl    $31, %esi
        shrl    $26, %esi
        addl    %ecx, %esi
        sarl    $6, %esi
        vmovd   %esi, %xmm0
        vpinsrd $1, %edx, %xmm0, %xmm0
        vpinsrd $1, %edi, %xmm2, %xmm2
        vpextrd $2, %xmm1, %ecx
        movl    %ecx, %edx
        sarl    $31, %edx
        shrl    $26, %edx
        addl    %ecx, %edx
        sarl    $6, %edx
        vpextrd $3, %xmm1, %esi
        vpinsrd $2, %edx, %xmm2, %xmm1
        movl    %esi, %edx
        sarl    $31, %edx
        shrl    $26, %edx
        addl    %esi, %edx
        sarl    $6, %edx
        vpinsrd $3, %edx, %xmm1, %xmm1
        vpinsrd $2, %eax, %xmm0, %xmm0
        movl    %r8d, %eax
        sarl    $31, %eax
        shrl    $26, %eax
        addl    %r8d, %eax
        sarl    $6, %eax
        vpinsrd $3, %eax, %xmm0, %xmm0
        vinserti128     $1, %xmm1, %ymm0, %ymm0

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