[LLVMbugs] [Bug 15389] New: Mips Backend generates wrong code for vaarg

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=15389

            Bug ID: 15389
           Summary: Mips Backend generates wrong code for vaarg
           Product: new-bugs
           Version: 3.2
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: n.stavropoulos at think-silicon.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

Created attachment 10105
  --> http://llvm.org/bugs/attachment.cgi?id=10105&action=edit
assembly code for mipsel. bug between lines 253 -259

typedef integer I;
void test1(I p0, I p1, I p2, I p3, I p4, I p5, I p6, I p7, I p8, ...)
{
  va_list select;

  va_start (select, p8);

  report( va_arg(select,I) );
  report( va_arg(select,I) );
  report( va_arg(select,I) );

  va_end (select);
}


typedef long long L;

void test2(auto L p0, auto L p1, auto L p2, auto L p4, ...)
{
  va_list select;

  va_start (select, p4);

  report( va_arg(select,L) );
  report( va_arg(select,I) );
  report( va_arg(select,L) );

  va_end (select);
}

int main(void)
{
    test1(0L, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11);
    test2(1, 2, 3, 4, 5LL, 6, 7LL);
    return 0;
}
report is just print function
in this code mipsel backend fails to generate correct code

attached mipsel.s code generated with command


"llc -O1  -march=mipsel -relocation-model=static -asm-verbose
-mattr=+condmov,-muldivadd,+single-float,-fp64,+o32,-bitcount"

this bug is generated for every -O argument

in test2 function,we have to report a long long value then an integer and
finally a long long.
for some reason backend does addiu $3, $2, 4 and the last argument is not read
correctly. 

        addiu   $sp, $sp, -24
        sw      $ra, 20($sp)            # 4-byte Folded Spill
        addiu   $2, $sp, 56
        sw      $2, 16($sp)
        addiu   $2, $2, 8
        sw      $2, 16($sp)
        lw      $5, 60($sp)
        lw      $4, 56($sp)
        jal     _Z6reportx
        nop
        lw      $2, 16($sp)

###possible bug 
        addiu   $3, $2, 4
###possible bug 

        sw      $3, 16($sp)
        lw      $4, 0($2)
        jal     _Z6reporti
        nop
        lw      $2, 16($sp)
        addiu   $3, $2, 8
        sw      $3, 16($sp)
        lw      $5, 4($2)
        lw      $4, 0($2)

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