[LLVMbugs] [Bug 14093] New: pattern class does not work

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http://llvm.org/bugs/show_bug.cgi?id=14093

             Bug #: 14093
           Summary: pattern class does not work
           Product: tools
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: TableGen
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: rkotler at mips.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


Pat and ComplexPattern work but not Pattern

class Pattern<dag patternToMatch, list<dag> resultInstrs> {
  dag             PatternToMatch  = patternToMatch;
  list<dag>       ResultInstrs    = resultInstrs;
  list<Predicate> Predicates      = [];  // See class Instruction in Target.td.
  int             AddedComplexity = 0;   // See class Instruction in Target.td.
}

I get an error:

Cannot handle instructions with temporaries yet!

When I try and use it.

Here is a simple place I wanted to use it.

...


On multiply, the result implicit is placed in a 64 bit hi/lo register.

//
// Format: MFLO rx MIPS16e
// Purpose: Move From LO Register
// To copy the special purpose LO register to a GPR.
//
def Mflo16: FRR16_M_ins<0b10010, "mflo", IIAlu> {
  let Uses = [LO];
  let neverHasSideEffects = 1;
}

//
// Pseudo Instruction for mult
//
def MultRxRy16:  FMULT16_ins<"mult",  IIAlu> {
  let isCommutable = 1;
  let neverHasSideEffects = 1;
  let Defs = [HI, LO];
}

def: Mips16Pattern<(mul CPU16Regs:$l, CPU16Regs:$r),
              [(MultRxRyRz16 CPU16Regs:$l, CPU16Regs:$r), (Mflo16) ]>;

Without the list of instructions feature in the Pattern class, I am forced to
make a pseudo that has both the mul and mflo instruction in it.

This is a very simple example and some, like for example the conditional move
have 3 instructions with sequences like:

cmp x,y
bnez .+4
move a, b

I am able to do all of this just fine with pseudo's but it's not as clean a
solution.

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