[LLVMbugs] [Bug 14380] New: Possible bug in the code-gen documentation

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=14380

             Bug #: 14380
           Summary: Possible bug in the code-gen documentation
           Product: Documentation
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: General docs
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: eliben at gmail.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


http://llvm.org/docs/CodeGenerator.html#selectiondag-select-phase

At some point the doc shows a piece of TableGen definition file and says:

"The portion of the instruction definition in bold indicates the pattern used
to match the instruction. The DAG operators (like fmul/fadd) are defined in the
include/llvm/Target/TargetSelectionDAG.td file. ” F4RC” is the register class
of the input and result values."

However, I can't discern anything bold in that code.

[I hope it's not just my poor eyesight...]

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