[LLVMbugs] [Bug 14315] New: Register regmask dependency problem with misched

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=14315

             Bug #: 14315
           Summary: Register regmask dependency problem with misched
           Product: libraries
           Version: trunk
          Platform: PC
        OS/Version: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: Common Code Generator Code
        AssignedTo: unassignedbugs at nondot.org
        ReportedBy: hfinkel at anl.gov
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified


Created attachment 9523
  --> http://llvm.org/bugs/attachment.cgi?id=9523
bugpoint reduced test case

Now that PR14302 has been fixed, there seems to be another similar issue.

For this input block:
BB#0: derived from LLVM BB %entry
    Live Ins: %F1
        %vreg2<def> = COPY %F1; F8RC:%vreg2
        %vreg8<def> = LI -1; GPRC:%vreg8
        ADJCALLSTACKDOWN 112, %R1<imp-def>, %R1<imp-use>
        BL8_NOP_ELF <ga:@init>, <regmask>, %RM<imp-use>, %R1<imp-def>, ...
        ADJCALLSTACKUP 112, 0, %R1<imp-def>, %R1<imp-use>
        ADJCALLSTACKDOWN 112, %R1<imp-def>, %R1<imp-use>
        BL8_NOP_ELF <ga:@clock>, <regmask>, %RM<imp-use>, %R1<imp-def>, ...
        ADJCALLSTACKUP 112, 0, %R1<imp-def>, %R1<imp-use>
    Successors according to CFG: BB#1

The copy is not constrained to come before the call:

SU(0):   %vreg2<def> = COPY %F1; F8RC:%vreg2
  # preds left       : 0
  # succs left       : 0
  # rdefs left       : 0
  Latency            : 0
  Depth              : 0
  Height             : 0

(there is no dependency on the later call)

SU(3):   BL8_NOP_ELF <ga:@init>, <regmask>, %RM<imp-use>, %R1<imp-def>, ...
  # preds left       : 1
  # succs left       : 4
  # rdefs left       : 0
  Latency            : 1
  Depth              : 0
  Height             : 0
  Predecessors:
   out SU(2): Latency=1
  Successors:
   out SU(6): Latency=1
   out SU(4): Latency=1
   val SU(4): Latency=1
   ch  SU(6): Latency=0

and this leads to the copy being moved after the call. This asserts:

*** Bad machine code: Using an undefined physical register ***
- function:    s332
- basic block: BB#0 entry (0x23f4970)
- instruction: %F31<def> = COPY %F1
- operand 1:   %F1
LLVM ERROR: Found 1 machine code errors.

Test case attached. Run with llc -enable-misched

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